This LabVIEW FPGA IP core performs a Fast Fourier Transform (FFT) on time domain data, using block sizes of 1024 and 2048.

This LabVIEW FPGA IP core performs a Fast Fourier Transform on time domain data, using block sizes of 1024 and 2048.The example project generates uniform white noise on the FPGA and uses two DMA channels to stream both time domain and frequency domain data back to the Host. The Host VI then calculates the floating point FFT on the time domain signal and compares it to the fixed-point calculation from the FPGA VI. Both real and imaginary parts are plotted on the Front Panel.This can be modified for in-line processing, which performs the FFT calculation right after data is acquired using analog input channels. I'll upload a co-processing example soon.

Note:This LabVIEW FPGA IP uses the uses the FXP Multiply function found in the Fixed-Point Math Library for LabVIEW FPGA.Download and install the Fixed-Point Math Library for LabVIEW FPGA

Updated: I was having some trouble with the 1048 FFT sub-VIs linking to the 2048 FFT sub-VIs. I just updated the example code with two separate projects, which should help to avoid the issue.