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LV FPGA Pseudo Random Number Generator
Created on: Jun 26, 2007 6:58 PM by BetaCommunityContent - Last Modified: Jul 21, 2008 5:11 PM by JLS
REQUIREMENTS:
Application Software:
LabVIEW Full Development System 8.0
Driver Software:
NI-RIO 2.1
Hardware Family:
5B
Add-on Software:
IMAQ Vision for LabVIEW 8.6.1,8.6,8.5.1,8.5,8.2.1,8.2,8.0.1,8.0
Product Category:
5B Series
Development Topic:
Acquiring User Input
Industry:
Automotive
Application Type:
Resistance
Technology:
Java
LabVIEW FPGA VI and example showing how to generate pseudo random numbers using a linear feedback shift register algorithm.
The Pseudo Random Number Generator VI is built as an IP core for LV FPGA and can be used in a variety of applications. The VI is set to be reentrant so that it can be used multiple times in an application.The linear feedback shift register algorithm used to generate the pseudo random number is explained in detail in this Wikipedia article.
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