Use rising and falling edges as sample clock for analog output -- PCIe-6363

[vmangena]

Hello, 

I'm wiring an external digital signal to Port 0/Line 0 of a PCIe-6363 DAQ and trying to use it as a sample clock for an analog output. I would like the clock to include both rising and falling edges. Unfortunately, I just realized that the PCIe-6363 doesn't support the change detection property for the DAQmx Timing VI, which seems like the easiest way to implement this. 

Is there some way that I can implement this sample clock with this DAQ card? I can get the rising OR falling edges of the external digital signal to work as the sample clock but not both.

Additional information: the frequency of the rising/falling edges is 16 Khz. 

Thanks!

[Kevin_Price · Accepted solution]

You *can* use change detection, but you'll be using it *indirectly*.  

Create a DI task using change detection for the timing type.   When configuring your AO task timing, specify the 'source' input terminal as something like "/Dev1/di/SampleClock".  (Or possibly, you may find a property for "/Dev1/di/ChangeDetectEvent" as an alternative.  Further possibilities include the use of DAQmx Export Signal.)

Be sure to start the AO task first before starting the DI task.

Caveat: you won't have any timing information about when those AO samples get generated.  You'd need to add a counter task to measure those DI sample clock intervals to figure out timing.

-Kevin P