Power Electronics Development Center

The new NI SoftMotion Module we just released contains new officially supported IP blocks for power electronics control, including Trapezoidal and Space Vector commutation for three phase PMSM/BLDC motor/generators and inverters, Clarke and Park transforms, special PID control algorithms, etc.. These IP blocks are part of the NI SoftMotion Module 2011 f1 and NI RIO 4.0.1 release.

For those of you working on field oriented, vector control algorithms in particular, I hope that this will be useful. We are keen to hear your feedback and suggestions. I'm excited that we now have power electronics IP as part of an official NI supported product.

Palette Screenshots

Here are some screenshots of the new palettes. After installing, on the LabVIEW FPGA palette you can find the IP cores under NI SoftMotion > Motor Control IP Primitives > Servo Control > 3-Phase Servo Control.

Subfolders for Servo (PMSM/BLDC), Stepper, Sensor Feedback, Filters, etc.:

Servo (PMSM/BLDC) IP cores for the FPGA. There are new fixed-point PI and PID algorithms with higher precision internal word lengths. The Spline Interpolation algorithm is intended for precision motion control, but it's also useful for a wide range of applications, such as communicating between loops executing at different rates without the stepped signal edges caused by zero-order-hold effects (discrete time sampling that makes the signal look like a stair step to the faster loop, which will cause any derivatives/poles in the faster loop to "explode" numerically-- spline interpolation can be used to smooth the signals resulting in nice stable numerical results).

Clarke and Park Transforms, 3-Phase Space Vector Modulation, I2T current/temperature limiter, and a special PI controller for Flux/Torque loops. The Park Transform modifies the two phase orthogonal system (alpha,beta) into the flux,torque (d,q) rotating reference frame. The output is called the current vector. The Clarke Transform modifies the three phase system into the (alpha,beta) two dimensional orthogonal system. The Inverse Park Transform modifies the flux,torque (d,q) rotating reference frame into a two phase orthogonal system (alpha,beta).

Here's a detail of the flux/torque control loop PI algorithm for use with field-oriented control (FOC) commutation calculations. Direct Current specifies the direct current vector (d) from the Park transform. Quad Current specifies the quad current vector (q) from the Park transform.

Block diagram showing the fixed point inputs and outputs. A few things I love about the way it's implemented: 1. The state information is stored externally, a development practice that's because it makes it relatively easy to create a multi-channel version of your algorithm, 2. Everything is implemented in native LabVIEW G code, so you can go in and tweak/edit the algorithm freely and easily-- the philosophy of "LabVIEW to the pin" (avoid block boxes), 3. The underlying code is documented, including information about latency time resulting from the chosen pipelining approach.

Sensor feedback VIs. The Flux Angle Calculator calculates the angle of flux for the Park and Inverse Park transforms.

The flux angle calculation is based on the delta output of the Incremental Encoder Decoder or a valid Hall angle. It also support autophasing for brushless DC/PMSM motor control applications.

3-Phase PLL, Matrix*Vector Multiply, and Multichannel PID (implement up to 256 PID loops at 30+ kHz with minimal FPGA resource consumption). If you need a single channel PLL for single-phase power inverters, there is a Costas Loop PLL associated with the LabVIEW FPGA RF Communications Library that works well. It can be downloaded from this thread (PLLTest.zip).

Speaking of multichannel, also check out the multichannel low pass/high pass (Butterworth) and notch filter IP cores-- also very efficient in terms of FPGA resource utilization. These are location on the top level FPGA Math & Analysis palette. One things that's cool is that the filter coefficients are run-time changeable-- you can calculate new filter coefficients on your host processor and send to the FPGA while it's running. This is obviously important if the filters are part of your control loop and therefore need to be tuned. You can use the notch filter, for example, to decrease the gain of your control system at certain resonant frequencies you want to avoid. Obviously, the DC and RMS measurement VI is very important for electrical power applications.

The Analog Period Measurement algorithm above is obvisiously very useful in AC power applications-- for example, you can use it to measure the frequency of an AC signal, or measure the phase difference between two AC signals. Below is the recommended way to use it in electrical power applications. First, clean up the AC signal using a Butterworth Filter. In the configuration page, set it to be a 4th order lowpass filter with a 70 Hz cutoff frequency. With proper filtering, a hysteresis value of around 1 V may be fine. In the configuration page for the Analog Period Measurement function, place a checkmark in the Interpolate crossings checkbox. The Interpolate crossings setting computes the linear interpolation of the crossing instant to 8-bit accuracy. For sinusoidal signals, it can provide a significant increase in accuracy. Following this approach, you can achieve an extremely accurate period measurement.

Help Documentation

Do you RTFM? The main help file to look at is "nimclvfb.chm". Screenshot below. You can access the online version here.

Reference Designs

In addition to the IP blocks, there are complete reference design examples for Space Vector (FOC) Position Control, Space Vector (FOC) Velocity Control, and Trapezoidal Commutation. These examples are ready to run  using an NI 9502 module and AKM BLDC motor. Here's a screenshot from part of the FPGA VI on the FOC Position Control example.

The beautiful simplicity of the LabVIEW FPGA block diagram is amazing. This is graphical system design. It's like LabVIEW was invented to write power electronics control algorithms for FPGAs.

What do you think? Pretty cool, right? Please share your thoughts, comments and questions.