Handshaking with LabVIEW FPGA

[BeCeGa]

Handshaking with integers in FPGA

While developing applications with FPGA Targets frequently we find the need to pass and store large amount of information from our host to our FPGA target, this could be a configuration file,  the information in the registers of a device we are simulating, or information read from a Database.

Although using clusters and arrays on your LabVIEW FPGA front panel is convenient, for some applications the resulting performance and gate usage may not meet your requirements . For such applications you may consider handshaking your cluster/array data one integer value at a time. In general its not recommended to store large amounts of information in arrays in the front panel or use them to transfer the information between the host and the FGPA Target. In adition to this to free more gate space you should use memory blocksto store the information without having to sacrifice to much FGPA space.

   The basic idea here is send one data element at a time using a Boolean flag for handshaking between the host and the FPGA target

  On the FPGA you will have a system loop that will be constantly pulling a flag (the constant pulling is done on the FPGA side as it will not consume processor resources) to see if there is new data, when there is new data it will grab the information of the control and after that it will set the flag back to its original state and so it will wait again for a change

On the Host side we will just set the flag when there is new information ready for the FPGA to pull and will wait for the FPGA to reset the flag. (there is data pulling involved in at this moment but is normally for small amounts of time, a delay can be added in the pulling if the process is being disrupted.

If you are streming information between the Host and the FPGA at high rates, it might be a better option tu us DMA FIFOS

Notes:

The Read Mem table and Write Mem table Vis will read or write the total memory elements asked but they can be modified just to read specific memeory directions

The Host coudl be the Real Time Controler in a CRIO system, or the PXI or computer with a R Series Card