Various Methods of Pipelining on FPGA

[Larry_H]

This example consists of a generic math function shown in 4 different ways. The first way is the straight forward way that a normal programmer would use. The math function is then pipelined using basic methods involving feedback nodes, shift registers with while loops, and shift register with single cycle timed loops.The Host VI shows how many ticks each version of the math function takes to execute, along with the intermediate values of each method. You also have the option to compile each method separately to see the resource usage difference between each method of pipelining.

All necessary files are in the zip file. The project was built in LabVIEW 2011.