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Digital (Pipelined Sample Clock) - Continuous Output

VERSION 1 
Created on: Nov 13, 2012 3:50 PM by Travis_Ann_N - Last Modified:  Nov 13, 2012 4:05 PM by Travis_Ann_N

Description:

This examples demostrates how to interface the NI 6536/7 to a synchronous DAC with an output enable signal.

 

Block Diagram:

 

Digital (Pipelined Sample Clock) - Continuous Output.jpg

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