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Digital - Finite Output

VERSION 1 
Created on: Nov 13, 2012 4:20 PM by Travis_Ann_N - Last Modified:  Nov 13, 2012 4:23 PM by Travis_Ann_N

Description:

This example demonstrates how to generate a finite amount of digital data based off of a sample clock.

 

Some hardware (e.g. M Series DAQ) must use an external sample clock for digital tasks.  To view a complete list of available sample clock sources, consult the Device Routes table in Measurement and Automation Explorer.

 

For instructions on how to connect your signals to the DAQ device, refer to your device documentation.

 

Block Diagram:

Digital - Finite Output.jpg

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