Examples and IP for Software-Designed Instruments and NI FlexRIO

RFFE Example for the NI PXIe-5644R »   This example implements MIPI RF front end (RFFE) communication through the DIO port on the NI PXIe-5644R, including support for both master and slave functionality.

Description: The MIPI RF Front End (RFFE) specification was developed to form a standard bus protocol for devices in a radio frequency signal path to minimize noise coupled into the devices from digital signals and to solve high configuration speed requirements for MIMO applications. RFFE busses allow only a single master that drives a clock (SCLK) and data (SDATA) to multiple slave devices; the very low pin count (two pins) benefits overall system simplicity. This example includes an RFFE Master suitable for controlling an RFFE bus and an RFFE Slave. Note that the RFFE standard uses signaling levels (1.2 Volt or 1.8 Volt) that are not directly compatible with the NI PXIe-5644R DIO (3.3 V TTL). Therefore, external signal conditioning circuitry is required for any RFFE bus that is interfaced to the NI PXIe-5644R.

Additional Documentation:

• After Installation - C:\Program Files (x86)\National Instruments\LabVIEW 2012\examples\NI RFFE Example for the NI PXIe-5644R\Documentation\NI 5644R MIPI RF Front End (RFFE) Example.pdf

Compatibility:

• LabVIEW Version: 2012
• Hardware: NI PXIe-5644R

Dependencies:

• NI LabVIEW 2012 Support for NI PXIe-5644R 1.0 (NI MSI installer)
• RFFE IP (automatically resolved through VI package)

FPGA Footprint:

Xilinx Virtex-6 LX195T

• 5.1% / 6402 LUTs
• 3.4% / 8481 Flip-Flops
• 5.8% / 20 Block RAMs
• 0.0% / 0 DSP Slices
• ~100% compile success rate

Latest Version:

• RFFE Example for the NI PXIe-5644R 1.0.0 (LabVIEW 2012)

Previous Versions:

• none available

Note: All source on this community is distributed using VI Package Manager (VIPM). For more details on VIPM, please read A Note on VI Package Manager