Multi-Channel FFT IP

[griffindore]

When requiring a long length FFT for several channels, it's quite common to run out of space on the FPGA. One way to avoid this limitation is to use the same FFT logic for multiple channels.

This IP is a Multi-Channel FFT that allows you to run multiple data channels through the same FFT logic by buffering points in VI-Scoped FIFOs. Each channel buffers up the number of points required for the FFT in its FIFO. After each channel's FIFO has enough points required for the full length of the FFT, each channel, one after the other, streams its points from the FIFO through the FFT. This requires that each channel pass data to the Multi-Channel FFT IP at the same rate. The maximum data rate for incoming data is limited by the FPGA clock rate that the FFT is contained in divided by the number of channels used.

The settings for the FFT used in this implementation are shown below. Change these settings in the FFT Express VI properties if needed. To change the number of Channels, you will need to edit the number of FIFOs used. If the length of the FFT is changed, be sure to adjust the depth of the FIFOs appropriately.

Updated: Fixed a bug with the error output. Included a polymorphic version to select between different lengths, number of channels, and whether only real data or both real and imaginary data are input. When using only real data, block memory FIFOs are not used to store imaginary data which saves signifcant amounts of memory.

List of Multi-Channel FFTs:

Length: 4096
Channels: 8
Real and Imaginary Data input version and Real Data input only version

Length: 4096
Channels: 4
Real and Imaginary Data input version and Real Data input only version

Length: 256
Channels: 16
Real and Imaginary Data input version and Real Data input only version

All implemented with the following settings:

Forward FFT
Input Data Type: <s, 18, 4>
Output Data Type: <s, 31, 17>
Execution Mode: Inside Single-Cycle Timed Loop
Throughput: 1 cycle/sample

Note: The Multi-Channel 4096 point FFT consumes significant amounts of memory, and it does not compile on the Virtex-II FPGAs.

Update 2/13/09: Made a change to Multi-Ch FFTs so that they filter out an invalid Ch number instead of writing to Ch 0s FIFO in the default case. Also added a VI, "multi-ch FFT test.vi" that tests the Multi-Ch FFT IP in the Development Environment and compares the output of the Multi-Ch FFT IP to LabVIEW's FFT pt by pt subVI.

[gregopher]

What platform did you use to develop this algorithm?  I'm having trouble getting it to complile on an NI 9116 when the throughput is set to "1 cycle/sample".  The compiler reports it consumes too many DSP48E resources.  Ever run into this problem?

[griffindore]

Hi gregopher,

I used the FlexRIO platform (7854R if I remember correctly) when I developed these tools. The multi-channel FFTs are meant to conserve the DSP48E resources by re-using the same FFT logic for multiple channels. It does not conserve memory blocks because it still stores all the channels in its own memory. The memory usage should be roughly the same between using a multi-channel FFT and multiple single channel FFTs.

The 1 cycle/sample implementation of the FFT uses considerable more DSP48E resources than using the burst mode, but then you'd have to make sure that your FFT is running in a considerably faster clock domain than your acquisition rate. If you're on a cRIO platform, that shouldn't be as much of a concern as if you were on a FlexRIO platform. I haven't re-visited this example code since I first created it, so I don't think it has an implementation for burst mode. What FFT size, acquisition ratre, number of channels, and input type (complex or real) are you dealing with?

Regards,

Mike Lyons

[E.Garcia]

Isn't it necessary to reset the FFT each time the channel is switched?

Thanks

Ernesto

[griffindore]

No, because it is streaming a new data set for a completely new calculation. If you do an 8192 point FFT, it only uses those 8192 points to calculate the FFT. There is no overlap.

[ArunJ]

Hi, I want to implement this Multi Ch FFT outside SCTL, what modifications do I have to make?