Student Projects

cancel
Showing results for 
Search instead for 
Did you mean: 

FPGA driven Real Time Video Capture and Barcode Scanning using NI LabVIEW

Contact Information

University and Department: Purdue University, Electrical Engineering Department

Team Members

Faculty Advisor(s)

Nikolaus Utomo

Sahm Litkouhi

Barrett F Robinson

Primary Email Address:slitko@purdue.edu

Primary Telephone Number (include area and country code):248-202-4932

Project Information

List all parts (hardware, software, etc.) you used to design and complete your project:

NI CRIO 9012, NI 9401, LabVIEW, LabVIEW Real Time, LabVIEW FPGA, analog NTSC CCD camera, 5V and 12V power supply, connector cable with fan-out board, breadboard, one LM1881 sync stripper, two LM393 comparators, four 10k potentiometers, one 74HC148 8-3 priority encoder, ten 0.1 µF capacitors, four 1kΩ resistors, one 680Ω resistor, one 680kΩ resistor, and one 510 pF capacitor.

Describe the challenge your project is trying to solve.

The challenge this project sets forth is to use the NI Compact RIO to sample an analog NTSC video signal, capture each frame, interpret each frame to scan a barcode, and update the computer monitor with the captured video.  The analog NTSC video signal should be digitized before reaching the C-RIO using an external circuit.  The video signal synchronization information should be stripped externally using an IC and delivered to the CRIO to provide a synchronizing reference.  The FPGA in the C-RIO should be programmed to ensure deterministic, real time sampling and capture of the video.  The barcode scanning algorithm must be implemented in LabVIEW and should successfully scan the barcode at any orientation.  The algorithm should be fast enough to run at a continuous rate.  Lastly, the C-RIO should be connected to a computer so that fast image updates may be viewed on the monitor.

Describe how you addressed the challenge through your project.

The first step towards addressing this challenge was to build an external A/D converter circuit that would quantize the analog NTSC video signal into 3 bits representing grayscale intensity.  This was accomplished by using LM 393 comparators and elementary logic gates in a flash configuration.  The A/D converters for the CRIO are too slow to meet sampling requirements for the video.  A 256x256 image at 60 Hz was required, so by building an external A/D converter it was possible to use the NI 9401 high speed digital input output card.  This configuration was able to sample fast enough for a high resolution image.

The second step was to program the CRIO to synchronize with the incoming digitized video.  This means the CRIO would require a digital signal with patterns to indicate where the video started and where each line began.  This signal was provided by using the LM1881 synchronization stripper.  By creating a state machine in the FPGA that recognizes the patterns on the synchronization signal, the program could define when each pixel could be sampled from the incoming video.

After determining when samples should be taken, the next step is to accumulate the samples into a 256x256 pixel image.  The samples were place on a DMA FIFO so that a VI on the computer or on the real time controller could pick up the video one frame at a time.  By virtue of implementing video capture on the FPGA, this process is completely deterministic at a rate of 60 Hz.

In contrast, the VI running on the computer that picks up the frames and updates the display is susceptible to delay.  In experiment, the VI runs fast enough to update video at 30 Hz.  This speed discrepancy can cause the FIFO to overflow.  To prevent overflow, the FPGA was forced to decimate the frame rate and in case of overflow, the VI on the computer clears the FIFO to spare future frames from corruption.

The VI that receives frames from the FPGA also runs the barcode scanning algorithm.  In order to ensure that high priority tasks (i.e. retrieving frames from the FIFO) have priority over low priority tasks (i.e. scanning the image for a barcode), two separate and prioritized timed loops were used.

The scanning algorithm has to read the barcode at a random orientation. This requires some image processing.  First it detects the four corners of the barcode. Then, based on the position of the corners, it determines the position of the barcode, and selects the best scan line. The algorithm can scan in three directions, horizontally, vertically, and diagonally. It also determines if it should start the scan from the corner or the middle of the barcode’s edge. The program is divided into 8 cases depending on the scanning direction and the starting point. Lastly, it checks if the barcode is oriented in a forward or backward direction by scanning the first 3 bars.

The algorithm also has to find the relative size of the wide bar and narrow bar, since it has to work at any distance from the camera as long as the whole barcode is inside the picture. It detects the first bar of the barcode, and finds the relative width of the wide and narrow bar.

The algorithm was designed to scan the barcode continuously. It was intended to run at 60 Hz, but in experiment it ran at 30 Hz.  The design strives for simplicity in order to minimize the time consumption on the calculation, decision making, and scanning time.  In the end, the project requirements were still satisfied because for all practical purposes, 30 Hz is rapid enough to be perceived as a continuous process to the user.

This algorithm is straightforward enough to be transferred to the FPGA.  In the next modification, the barcode scanning will run at 60 Hz because it will run on the FPGA.  This will create a closed loop embedded system that interprets every frame without missing a beat.

Setting the final product aside, what makes this project most significant is that it has created a platform for real time, deterministic image processing.  The application chosen here was barcode scanning, but this conception is extendable to other image processing application.

Contributors