Introduction
The LabVIEW FPGA IP Integration Node provides cycle accurate simulation within the LabVIEW execution environment for third party IP. In addition, the node provides a wizard interface that simply requires selecting VHDL files or a Xilinx Coregen® *.xco file. The node does not require creating wrapper code. The IP used in the IP Integration Node must use a single clock and must not have falling edge flip flops on the interface for correct co-simulation with the rest of the LabVIEW diagram.
Requirements
LabVIEW 2009, LabVIEW FPGA 2009 with the Compile Server and Xilinx® installed.
Installation
1. Download and unzip the attached IpIntegrationNode.zip.
2. Run setup.exe. Note this installer will modify your global "Xilinx" environment variable to match wherever the LabVIEW FPGA installer installed Xilinx®.
3. Restart LabVIEW 2009 if it was running during the installation process.
4. Drop the IP Integration Node off the "Addons" palette inside a single-cycle Timed Loop and follow the directions within the dialog for selecting and configuring your IP.
Welcome to using this IP Integration Node. This can speed up your development of LabVIEW FPGA applications significantly, especially for high speed applications.