LabVIEW-Multisim Co-Simulation with Variants and Hierarchical Blocks (Part 2)

[GarretF]

Last week I described how to achieve design reuse for LabVIEW-Multisim co-simulation using variants, and promised to describe how to achieve the same thing using hierarchical blocks the week after. Our goal was to be able to use only one design, whether for LabVIEW-Multisim co-simulation, Multisim-only simulation, or transfer to Ultiboard for layout.

Hierarchical Blocks

The HB/SC connectors that you use for co-simulation are the exact same connectors that you use for hierarchical designs. By using the exact same connectors, the design you have for co-simulation is already setup for hierarchical designs, so our first step is to create a container schematic to host the design.

File > New Design

Next, we will place the primary design as a hierarchical block in this container (Place > Hierarchical block from file...). If your using the summer example, you can file the same at C:\Users\Public\Documents\National Instruments\Circuit Design Suite 12.0\samples\LabVIEW-Multisim Co-simulation\summer.ms12.

Our design looks a little sparse, so let's add some sources to drive the input connectors and a scope to show the output.

For LabVIEW-Multisim co-simulation, just simulate as normal. For Multisim-only simulation, select the container design, and simulate. For transfer to Ultiboard, open the summer design, and transfer as normal.

I've attached the complete design as a Multisim packed project.