3-Bit Counter Simulation with LabVIEW

[Chris_G.]

Overview

This VI simulates a 3-Bit Counter

Description

LabVIEW is not only useful for application development, but can also be used for basic design simulation for boolean logic. In order to fully understand the way which boolean logic is implemented for specific designs, one can use the Boolean palette of the Functions Palette in order to simulate a piece of hardware, and find out if the design will work as intended. The attached example demonstrates the use of the Boolean palette (along with feedback nodes) to create a 3-bit Counter.  Since LabVIEW is already a dataflow-based graphical language, one can lay out the different Boolean AND, OR, and NOT gates as they would in a schematic, and run the VI they’ve created to see if it works. 

Requirements

LabVIEW 2012 (or compatible)

Steps to Implement or Execute Code

1. Run the VI 

Additional Information or References

VI Block Diagram

**This document has been updated to meet the current required format for the NI Code Exchange. **

[Christian_L]

Your logic doesn't scale well as you add more bits. The state of each bit should only depend on the previous bit, where the current bit toggles if the previous bit changes from high to low.

i.e.  N=(N-1)'  if M'+M-1

else N=N-1

or put another way

N = (N-1) XOR (M' AND M-1)

[Chris_G.]

I am glad that you are thinking out of the box, and not taking my solution as "the" solution.  By all means, improve this example to share with us a more efficient or scalable way of doing this!