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FlexRIO SPI Example - Simulation and Real IO

by:
‎12-08-2020 09:46 AM
Last Edited by: Active Participant Terry_ALE Active Participant ‎12-08-2020 03:57 PM

Products and Environment

This section reflects the products and operating system used to create the example.

To download NI software, including the products shown below, visit ni.com/downloads.

    Operating System

  • Windows

    Programming Language

  • LabVIEW G

Code and Documents

Attachment

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Third-Party Code Repository

Some users manage their code in repositories outside of ni.com. Use your best judgment when following links to third-party sites. http://ftp.ni.com/evaluation/labview/lvtn/vipm/packages

Description

This example showing a SPI implementation on NI FlexRIO with digital FlexRIO Adapter Module. The implementation is bassed on NI SPI IP. You can run this example in simulation mode or with real IO.

 

 

 

 

How to Use

  1. Download the attached .zip file and unzip the file.

  2. Install the NI SPI IP with help of the VI-Package Manager. You can either search in the VI-Package Manger for NI SPI IP or you can use the package in the following location: Exercise>>FlexRIO SPI Example with Simulation>>NI SPI IP for offline installation>>national_instruments_lib_ni_spi_ip-1.3.0.1.vip

  3. Open the FlexRIO – NI SPI FPGA Simulation.lvp
    Open the VI in project FlexRIO - NI SPI FPGA Simulation and Real IO - FPGA.vi and analyze the Frontpanel and Blockdiagram.

    Note:

    - The FPGA Execution mode is: Simulation

    - All hardware related funktions are disabled by using conditional case structures.

    - The SPI Master and Slave are connected in the Master/Slave Connection loop via Local Variables and Wires instead of using a physical connection.

  4. Run the VI, change the values in the Master Data Write and Slave Data Write controls. Press the Start button to send the new values.

  5. Stop the VI.

  6. For better understanding how SPI works, open FlexRIO - NI SPI FPGA Simulation - Host.vi and run it. This VI running cycle accurate the FPGA Simulation and show the signals in a Digital Waveform graph.

  7.  Stop the VI

  8. For using Real IO, only switch the Execution mode to FPGA Target and compile the FPGA VI.

  9. Connect the four DIO lines Chip Selecct, Clock, MOSI and MISO to get a loop back setup.

  10. Run the FPGA VI again. Please note that the Simulation VI on My Computer (host) only working win simulation mode. 

 

 

 

Note: If the FlexRIO boad or the adapter module don’t fit to your setup and you want to use another Digital FlexRIO Adapter, add both to the project and copy or move the FPGA files to the new target.

 

 

 

Additional Information

Software

  • LabVIEW 2020 or higher
  • LabVIEW FPGA 2020 or higher
    • FlexRIO with Modular I/O 20.0 or higher

 

Hardware

  • NI 797xR + NI 6581B adapter module (NI 6583 would also work)
  • SHC68-C68-D4 cable
  • SMB-2163 + 4 SMB cables or CB-2162

 

 

 

Related Links

Helpful Knowledge Base: Understanding the SPI Bus with NI LabVIEW.

 

 

 

Example code from the Example Code Exchange in the NI Community is licensed with the MIT license.