GPIB SRQ causes data loss?

[Steven_T]

Hello,

Well, usually the ISR will detect what condition made it fire and then call something to take care of the interrupt.  Most data transactions could be done by the ISR checking if it is in talk mode, listen mode, etc. 

I would recommend adding some debug prints at the beginning and end of any routine that transmits data (including the SRQ).  Perhaps the programmer has more than one place where data is transmitted.  If you see any overlapping calls between a transmit routine and the SRQ, it will mean that there is an opportunity for the SRQ to mess up transmission.

I was not able to find any documentation about this chip on the Measurement Computing site.  Have you contacted them for help?  It may be possible that they have sample firmware or some other way to check the chip interface.

Steven T.

[Anonymous]

All data transmissions go through a single tiny function that loads
one byte into the data out register. Aside from the SRQ, data is
transmitted in exactly two places.

At the start of each tx message, transmit interrupts are enabled and
the first message byte is loaded into the data out register.

From then on as each tx interrupt occurs the next byte is placed in
the data out register. When all bytes are transmitted, transmit
interrupts are turned off.

SRQ operation is something of a mystery to me. Isn't that handled at
the chip level? I don't do anything with SRQ other than raise SRQ by
loading the serial poll register with 0x40 (rsv bit set) when required
(and never while a message is being transmitted), and the chip itself
returns the status byte.

The tiny function that loads the data out register always makes sure
that a serial poll is not in progress before loading a byte (SPMS bit
in the address mode register). I am unsure about the SPMS bit though.
Is that a reliable way to know that a data byte should not be loaded
for transmission?

Measurement Computing is not at all useful. They first tell me, "we
only support OEMs who use the chip". When told that we ARE an OEM
buying chips in quantity they then said, "Sorry, that chip is obsolete
and we will not support it". I've downloaded some spec sheets from
other manufacturers and it seems that at the basic register set is
pretty common to all of them and we are not using any unusual
features.

Thanks for your advice!

[Anonymous]

The simple approach might be to know exactly when it's safe to load a
byte into the data out register to avoid data loss.

In our "load data byte for transmit" function a data byte is only
loaded when the address status register shows that
SPMS (serial poll mode status) is clear, TA (talker mode) is set, and
LA (listener mode) is clear.

Is there some other condition that should be checked?

TIA