Files are gone in C:\NIFPGA\jobs

[MrQuestion]

When I compile a LabVIEW fpga and an error occurs in the compilation I only have the Xilinx results for troubleshooting. Most of the errors I get tell me to look at some file in the C:\NIFPGA\jobs folder. But, that is completely useless when that directory is automatically deleted when the Compilation Status announces that you have an error.

Is there a way to stop the files in the C:\NIFPGA\jobs directory from being deleted upon an error.

I can understand deleting the directory on a successfully compilation to prevent disk space usage, but for an error?

[Austin_S]

Could you post a screenshot of this error and the file that it directs you to? 

Also, make sure that you have the files in that folder set to "show hidden files" in your Folder options settings.

[MrQuestion]

I eventually solved this error. It ended up that the engineers designing the socketed clip no longer needed a clock line. But I had LabVIEW creating a clock in the clock manager (DCM). The clock line wasn't being routed to anything producing this error.

But the clock routing wasn't my real complaint here. My issue is that during the compile process the XILINX ISE places many files in the c:\NIFPGA\JOBS\XXX

where XXX is some random number.

On the occasional failur (not so occasional when the project is still young) The error report will tell me to reference some line in some file in this directory, but this folder disapears once the error report is finished.

I can see the folder and files during the compile process, but once the error report is generated it is automatically deleted.

Analyzing hierarchy for entity <NiFpgaAG_NI_Munge_I2C_Communication_for_EEPROM_vi_FPGACompileCopy00000001> in library <work> (architecture <vhdl_labview>).

WARNING:Xst:1994 - "C:/NIFPGA/jobs/KSw9nkc_fqu2nOv/PkgNiUtilities.vhd" line 336: Null range in type of signal <Vec>.

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Running post-placement packing...

Writing output files...

ERROR:PhysDesignRules:1577 - Illegal routing. The DCM_ADV block <Puma15Window/NiFpgaStockDcmInst0/DCMx> has CLK output

   pin <CLKFX> with incomplete or incorrect connectivity. Routing from the <CLKFX> pin to a BUFG, BUFGCTRL or PLL_ADV

   block type was not found. The DCM_ADV CLK output pins can only route to BUFG, BUFGCTRL or PLL_ADV block types.

ERROR:Pack:1642 - Errors in physical DRC.

Mapping completed.

See MAP report file "Puma15Top_map.mrp" for details.

Problem encountered during the packing phase.

Design Summary

--------------

Number of errors   :   2

Number of warnings : 282

Process "Map" failed

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