08-04-2022 01:40 AM
Hi
I can compile my FPGA code at 140MHz and I want the measure frequncy of signal around 77.8Mhz using 2 counters by counting rising edges in a given time , let’s say if I set my gate to 1s gate time then I should be able to count 77.8Mhz +- 1 Hz . Is my calculation correct ? Can I measure 77.8 MHz using this methods with 1 hz error using 140 MHz clock ?
08-04-2022 01:49 AM
Hi tintin,
@tintin_99 wrote:
Can I measure 77.8 MHz using this methods with 1 hz error using 140 MHz clock ?
Have you heard about Mr. Nyquist?
When you run your FPGA loop at 140MHz you can detect changes in a digital signal with a frequency of 70MHz: first iteration you get a FALSE, the next iteration gives a TRUE. How do you want to detect faster signal changes?
Which hardware do you use? How do you measure the digital input? Does your hardware even allow detecting/measuring digital signals at this samplerate?
08-04-2022 06:52 AM - edited 08-04-2022 06:57 AM
Isn't there the 'trick' that parts of the FPGA can run faster than the clock?
How about a prescaler dividing the input by 4/8/16/...
create a fast clocked timer , fetch the timer value each prescaler slope
now you have timestamped prescaler ticks and you can apply a slope -> frequency
depending on the timer clock you get your 1 Hz resolution much faster 🙂
and you can use more than 2 timestamps and fit the slope ...
.. make an adjucated guess of the uncertainty ...
later you wonder about stuff like phase noise 😉