LabVIEW

cancel
Showing results for 
Search instead for 
Did you mean: 

Getting input signal from encoder

Hi Gerrald,

 

Yup, you are right. It is the same but a bit of modification to make. But how about the Hostvi and Subvi? Must I copy them also?

0 Kudos
Message 11 of 29
(746 Views)

Hi YQ_sg,

 

Yes, if you noticed, the Host VI serves as the user interface to the program. This is where the data acquired is calibrated and then displayed. Meanwhile, FPGA VI is the VI that would acquire the signals through the cRIO. Therefore, you need to access the FPGA VI inside the Host VI. This is why you see the FPGA Reference VI at the start of the Host VI. However, since the Host VI in the example was built for thermocouple readings, you will need to modify it such that the acquired signals from the FPGA will be treated as quadrature encoder outputs(since you are actually acquiring encoder outputs instead of thermocouple outputs). So my answer to your question is yes you may also copy those but like I said, you must also modify them to meet your requirements for the encoder. I hope I was able to give you a clearer understanding of the FPGA programming structure. Thanks!

Best Regards,
Gerrald Mateo
Applications Engineer
National Instruments
0 Kudos
Message 12 of 29
(738 Views)

Hi Gerrald, 

 

I am trying to configure the NI 9211 Fpga Example to my application using the "Using This Example" that you recommended. May i know how can i delete away the My Computer component?

0 Kudos
Message 13 of 29
(716 Views)

Hi afai,

 

The My Computer component cannot be removed from the project explorer because this is the representation of the Host which is your computer. Maybe you meant how to remove the other cRIO target from the project explorer? If so, you may follow step 13 stated in the file. Thank you.

Best Regards,
Gerrald Mateo
Applications Engineer
National Instruments
0 Kudos
Message 14 of 29
(706 Views)

Hi Gerrald,

 

FInally, I managed to get the number of counts from my encoder thanks to you. For now, I just need to put it onto a sine wave graph. May i know how to do it? Because I have try but still i got broken wires and errors.

0 Kudos
Message 15 of 29
(702 Views)

Hi afai,

 

Congratulations on that! That's great to hear.

 

Now, for the graphing of the encoder output, I believe you won't be getting sine waves because these are pulses we are dealing with right?

To display these pulses graphically, you will need to connect the waveform graph before the encoder signals are converted into counts. If you have dificulty tracing this part, you may send me the VI that you currently have. Thanks.

 

Best Regards,
Gerrald Mateo
Applications Engineer
National Instruments
0 Kudos
Message 16 of 29
(700 Views)

Hi Gerrald,

 

I have attached the vi for you to see and help me in putting it into a waveform graph. But I still wondering how I could make a Hostvi for this project. Do you know of any ways that i could convert this counts into angles (degree)?

0 Kudos
Message 17 of 29
(690 Views)

Hi afai,

 

Judging from the block diagram, you can display the raw encoder signals if your connect the graph directly to the output of the FPGA I/O node, specifically to your Quad ChaA/B/C/D nodes.

 

To get the appropriate angle for each count, you must now the specification of your encoder first. Usually, each count will correspond to an angle. For example, one count may be equal to 10 degrees. If you know this, you can simply multiply the known angle to the number of counts that you have.

 

For the Host VI, you may follow the steps here under LabVIEW Real-Time Steps
http://zone.ni.com/devzone/cda/tut/p/id/3921

It enumerates the steps needed to create the final Host VI for your FPGA project. 

Best Regards,
Gerrald Mateo
Applications Engineer
National Instruments
0 Kudos
Message 18 of 29
(682 Views)

Hi Gerrald,

 

I seems to have a problem connecting a waveform graph to the output of the FPGA I/O node. It keeps on giving me broken wires. How can I solve this problem? Could you gave me a screenshot for this?

0 Kudos
Message 19 of 29
(677 Views)

Hi afai,

 

Apologies, but I don't have an access to a cRIO right now so I won't be able to send you a screen shot. However, what we could do is work with the error that you are getting. May I know the data type that is coming from you IO nodes? To determine this you can click on the context help icon, the question mark at the upper right part of your block diagram, and then point at the resulting broken line. This will tell us the conflicting data types between the output and input terminals. You may send me a screen shot of this if you want. Trying to connect a wafeform chart may also be a good option for you just to try out if the data types would match. Thanks.

Best Regards,
Gerrald Mateo
Applications Engineer
National Instruments
0 Kudos
Message 20 of 29
(672 Views)