04-06-2012 02:47 PM
The attached VI is an implementation of output characteristics of a transistor. I have implemented using basic equations. However, my problem is that the XY graph retraces to 0 and then starts for a new value of VBB. I dont want that retrace path. By this, I mean is that as soon as the completion of the inner loop the outer value is updated. Since the inner loop starts agains with 0, I dont want the line from the last iteration of the inner loop to the new interation of the inner loop.
How can I remove that. Please help
Solved! Go to Solution.
04-06-2012 03:17 PM
Insert an extra point containing NaN into the data, it will break the line.
04-06-2012 03:32 PM
I did not understand it clearly. Where to insert and how to insert. Can you please if possible modify the VI and help me.
04-06-2012 03:43 PM - edited 04-06-2012 03:46 PM
Here is a quick draft.
I would recommend to use complex data for the xy graph, it dramatically simplifies the code.
(Some other points: don't use while loops as for loops. Since you know the number of iterations before the loop starts, a FOR looop is correct. Use the correct data types for diagram constants. There is a primitive for "+1")
04-06-2012 03:43 PM
Got it.. Thanks a lot.. U are a champion indeed, Sir. Thanks a bunch 😄
04-06-2012 03:48 PM
Can you tell me why did you add the Re/Im to Complex part ?
The VI rocks. Hats off to you.
04-06-2012 05:29 PM
@Jay.kothari wrote:
Can you tell me why did you add the Re/Im to Complex part ?
XY graphs accept many types of data. Cleanest is complex data, where it simply graphs IM vs RE. All you need is a single 1D array instead of more complicated data structures.
Some of the possible datatypes for xy graphs are listed here:
(see also)