Using FIFO on Fpga target in MyRio

[Aysha_shakeel]

Hi 

I am trying to use MyRio to input and process an analog signal on Fpga. As Fpga doesn't support displays I have used fifo and converted my data to the real time of MyRio now i want to use that again in Fpga module, i have tried to use to fifo in the same VI but it doesnt seem to work well. 

Regards 

[Terry_ALE]

Can you expand on what didn't work well?

[Bob_Schor]

Am currently working on a Project that takes A/D data from 16 SPI chips (in bursts of 10 samples at 10 kHz, bursts coming at 20-200 Hz for 1-8 seconds) and sends it to the RT side using an ADC FIFO.

Now, how useful is it to tell you what I did?  About as useful as your telling us what you tried to do.  We need to see all of your relevant code (as actual VIs that we can look at with LabVIEW).  If your Project is fairly small, the easiest way to do this is to compress the Project folder and attach the resulting .zip file (tell us which VIs we should examine).

Bob Schor 

[Aysha_shakeel]

Hi 

I have few queries regarding MyRio LabVIEW.

1. Why does Fpga MyRio doesn't support time loop sequence?

2. I wrote a code in RT and switched the same in Fpga target but results got distorted, So am confused does Fpga VI works different from the RT VI in LabView?

3. Is there a difference between the while loop cycles in Fpga VI then in RT VI?

4. As Fpga module doesn't support displays and you have to switch to the RT time module is FIFO the only method available?

5. Is there any detailed help with examples available for the MyRio Fpga target as NI forms are good but very generic a noob like me doesn't get much help on basic concepts there. 

Regards 

[GerdW]

Hi Aysha,

please don't create so many threads for (basically) the same problem…

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@Aysha_shakeel wrote:

1. Why does Fpga MyRio doesn't support time loop sequence?

2. I wrote a code in RT and switched the same in Fpga target but results got distorted, So am confused does Fpga VI works different from the RT VI in LabView?

3. Is there a difference between the while loop cycles in Fpga VI then in RT VI?

4. As Fpga module doesn't support displays and you have to switch to the RT time module is FIFO the only method available?

5. Is there any detailed help with examples available for the MyRio Fpga target as NI forms are good but very generic a noob like me doesn't get much help on basic concepts there.

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1. Does it really not support a TWL on FPGA!?

2. Moving VIs from RT (or Windows) target to FPGA target will onyl work for basic functions. You need to obey the FPGA specialties!

3. Yes, they are different targets!

4. No. You can also read FPGA controls/indicators from RT target. Or use interrupts…

5. Example VIs are found in the example finder, and example projects in the "New project" dialog. There are "cRIO Basics" tutorials, as well as "FPGA Basics". NI alos offers training for their Realtime targets! As a noob you really should use all those resources!

[Bob_Schor]

When you are a "noob" and are "Getting Started with myRIO", you should not try to directly use the FPGA, but should use the Express VIs (this is one of the few places that I actually appreciate Express VIs!) that NI supplies.  It will allow you to learn about LabVIEW Real-Time (another "new idea", where you not only have parallel processing due to the parallelism inherent in LabVIEW's Data Flow paradigm, but you have two separate computers, your PC running Windows and the myRIO running Linux-RT, both executing their own LabVIEW programs and exchanging data with each other through various means.

After you've mastered this, you might be ready to tackle FPGA.  But I'd recommend having real experience with LabVIEW, including being able to use DAQmx to acquire data and control devices without ever using the Dreaded DAQ Assistant and its Evil Twin, the Dynamic Data Wire.  Passing the CLD Exam (or even considering taking it) would be an indication you are "ready" for FPGA (IMHO).

Bob Schor

Bob Schor