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Cycle time control loop

In our laboratory we have a small power plant where we record different signals with a NI Compact DAQ System. Unfortunately we use the NI Compact DAQ System not only for data acquisition but also to control 2 drives respectively the plant (controller on PC => reference value (output controller) via NI Compact DAQ Analog Input Module to the drive respectively to the plant => current value of the plant via NI Compact DAQ Analog Input Module to the PC). Because of mechanical reasons we have quite a large dead time in our control loop. According to this dead time the bandwidth of our control loop is quite low (f<10hz).

 

If we exchange some mechanical parts including the drives the dead time in our plant will be dramatically reduced. The control unit of this new drives have a CAN-Bus Interface. Therefore the reference value must be transmitted via a NI Compact DAQ CAN-Bus Module.

 

The question is know which bandwidth can we achieve with this new control loop (controller on PC => reference value (output controller) via NI Compact DAQ CAN-Bus Module to the drive respectively to the plant => current value of the plant via NI Compact DAQ Analog Input Module to the PC)? f<50Hz? I know that the NI Compact DAQ System is nondeterministic but at the moment we don’t want to change the "recording part" of our system. In the future we may use a compact RIO system.

 

Thanks for your help.

 

Regards

PinkPanther

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Simple CAN traffic and single Analog Reads are measured in milliseconds(or less).  Timing shouldn't be an issue for you.  From your description, do you have everything running in sequence?  If so, you could re-architect your program so that each task runs in a separate parallel loop.  You could have your AI read as fast as you want while waiting for the dead band.


--Using LV8.2, 8.6, 2009, 2012--
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Hi

 

On the hardware side, the DAQmx Timing VI determines the rate of data flow from the device/sensor to the hardware buffer on the data acquisition board. On the software side, the DAQmx Read VI determines the transfer of data from the hardware buffer into software. 

 

 

Houssam Kassri

 

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