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Welcome to On-Chip FPGA Debugging

Xilinx® ChipScope™  and the LabVIEW FPGA CLIP Node provide the capability of advanced debugging of LabVIEW FPGA designs while they are running on the hardware. This thread is intended to foster discussion about the project. Please post your questions, suggestions and applications here. Our team including R&D, marketing, and support will actively monitor this discussion.

Thanks,

Donovan

Product Support Engineer - LabVIEW FPGA R&D

Donovan
Message 1 of 4
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I've noticed something a bit strange with the Chipscope interface. If you make a mistake with setting up the Chipscope CLIP (i.e. so that a VI containing it won't compile) it results in any subsequent VIs in the same project failing to compile. I haven't been able to pin down whether this is a fault with the CLIP handling itself or with the Chipscope interface in particular but it seems strange to me that VIs in the project that haven't been told to use the Chipscope CLIP are still referencing it and, hence, failing to compile if it is incorrect.

Thanks,

Andy

p.s. obviously, the way round this is to go back and just correct the problem with the Chipscope CLIP!!

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Message 2 of 4
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Hi DonovanB,

Is Chipscope supported on sbRIO9606?  I tried to retarget the LvFpgaChipScope_2010.zip example and noticed that I am unable to add the Component IP to my design.

Regards,

-SS



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Message 3 of 4
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Hi Donovan,

 

I am not finding 'NI LV FPGA 2017 clip geneartor' executable anywhere, for using chipscope debugging .

Could you please forward the link to download the same?

Thanks in advance.

 

Regards,

Chinna Thambi M.

 

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