Block RAM usage in compile

[jyang72211]

I looked at the compilation report, and the block RAM is zero.  When when the block RAM be non-zero?  how do you use the block RAM?  I thought I am storing my waveform in memory, but maybe it is not block RAM?

[Sev_K]

Block RAM, or block memory, is RAM that is embedded throughout the FPGA for storing data. In general, LabVIEW uses block RAM when synthesizing Memory & FIFO functions. You can specify how LabVIEW implements FIFOs and memory items using the FIFO Properties and Memory Properties dialog boxes, respectively. For example, you can choose either Block Memory (RAM) or Look-Up Table (LUT) implementation. How are you storing your waveform in your FPGA code? (array, memory block, fifo?)

[jyang72211]

I am using memory block to store the waveform.  Howcome block ram usage is not showing up during compilation?  In what circumstances would it shwo up in the compilation report?

[Sev_K]

Is your memory block implemented in Block RAM or a LUT? Which FPGA target are you using? If you can please attach your VI or a screenshot of you VI.

[jyang72211]

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@Sev_K wrote:

Is your memory block implemented in Block RAM or a LUT?  Block Memory. Which FPGA target are you using?  PCI-7833R.  If you can please attach your VI or a screenshot of you VI.

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[Sev_K]

I've created a simple VI that initializes a memory block with a sine wave of 1024 elements (I16). The amount of space that sine wave takes is 1024x16bits = 16kbits. Since the 7833R has 96 18kbit RAM blocks (See XC2V3000 spec sheet) we will need to use at least 1 18kbit memory block to store this waveform. This is exacly what we see in the compilation report:

[jyang72211]

Thanks.  I am trying to compare the PCI-7833R and the 9146 FPGA.  I am trying to understand all the resources available.  Is it true that we have unique resources below?

1. Flip Flops

2. LUT

3. DSP 48s

4 Block RAM

5. DMA Channel

6. 18x18 multiplexer

For the LUT, the PCI card has 4 input and the 9146 has 6 input.  I guess the more input the better? One has DSP 48s and the other has 18x18 multplexer.  Can they be compared?  

[Sev_K]

Have a look at this article: Differences Between Xilinx FPGA Families. Comparison between different FPGA families is not straightforward since newer FPGAs might have a smaller number of a given resource but a more efficient implementation of the FPGA code that translates to better performance. So compiling your code for 7833R and 9146 and then comparing the resource usage would give you a good idea of how much resources is consumed on each target