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Clock correction using SMB connector and GPS PPS on 9012, 9104

Henry,

 

I looked at the attachment, and the problem you are having is that in the DMA FIFO loop, you are getting stuck in the inner loop, and the only data being sent is the first value of the control (which due to a race condition, may not even be valid data).  You can verify this by running the code in Highlight Execution mode.

 

 

In general, your FPGA code will be running much faster than your RT code, and so using a DMA FIFO for single values is not your best option.  In this case, I would recommend using a control on the FPGA VI to send the value.  I imagine something like the image below might work.

 

 

2011-11-28_1047.png

 

Regards,

Drew T.
Camber Ridge, LLC.
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Hi Drew,

 

Thanks for your reply.

 

Yeah, I noticed that only the first value is transfered through the DMA FIFO. You are right. Can you tell me more about how to use a control on the FPGA VI to send the value? And what should I write in the FPGA trigger part? Can you give me a simple example as I have searched the find examples in the LabVIEW program but failed to find any information useful.

 

Thanks very much for your time and help!

 

Regards,

 

Henry

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Henry,

 

Information on how to use controls to transfer data to the FPGA VI in LabVIEW can be found in the LabVIEW help, here:

 

http://zone.ni.com/reference/en-XX/help/371599G-01/lvfpgaconcepts/pfi_data_transfer/

http://zone.ni.com/reference/en-XX/help/371599G-01/lvfpgahosthelp/writing_to_fpga_vi_controls/

 

As far as triggering in the FPGA code goes, there is a good Triggering example in the NI Example Finder (Help » Find Examples) under Hardware Input and Output » CompactRIO » FPGA Fundamentals » Triggers and Watchdog » Trigger Detection - Software - cRIO.lvproj.

 

Kind regards,

Drew T.
Camber Ridge, LLC.
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Hi Drew,

 

Now I want to synchronise the cRIO system time with the GPS time. Can you give me some hints on how can I lock the cRIO system time with the GPS time (or lock the cRIO on board clock with the GPS Pulse Per Second Signal)? I have had a look at the Phase Lock Loop, but I don't know how to program in the FPGA part of the cRIO to implement that. Can you help me with that?

 

Best regards,

 

Harry

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Hey Harry,

 

I was looking into how to set your cRIO to the GPS clock and stumbled across this article:

 

http://digital.ni.com/public.nsf/allkb/E30C283B6F8879A586257624004C48B0

 

This has some info, especially towards the bottom of the article that might be especially useful.

 

Hope This Helps,

 

Doug B 

Applications Engineer
National Instruments
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Hi Doug-B,

 

Thanks for your reply. Yeah, I have had a look at that article before, in that article, it uses the GPS to correct the drift of the cRIO. But I want to know if there is any method that we could use to synchronise the cRIO on board clock (e.g. 40MHz on board clock) to the GPS clock? I mean, in this way, the data measurements performed in the cRIO are synchronised with the GPS, right?

 

Thanks for your help!

 

Best regards,

 

Harry

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Hey Harry,

 

I understand what you are trying to do and I think that you can sync your cRIO to a GPS time signal. I have linked two articles below that might be helpful. I was also able to find that a LabVIEW Alliance Partner, a company called s-e-a makes a cRIO module for the sole purpose of synchronizing the cRIO to a GPS clock. This makes me think that it might be harder to do since people pay around $1000 for the module.

 

Here are the links to the possibly helpful articles:

http://digital.ni.com/public.nsf/allkb/D6734E48D0705B9386257942005DEA30

http://digital.ni.com/public.nsf/allkb/F2B057C72B537EA2862572D100646D43?OpenDocument

 

Here is a link to the s-e-a GPS sync toolkit:

http://www.sea-gmbh.com/en/products/labview-addon-toolkits/crio-sync-toolkit/

 

Hope This Helps,

 

Doug B

Applications Engineer
National Instruments
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