All DIO from Scratch

[SunainaK]

Description:

Simple FPGA personality that implements dedicated DIO lines. Used with RT_BinaryCounter.vi to see how data is transferred between the FPGA and the Real-time system.

Instructions on how to use Code: 

If you do not have the FPGA module:

Open RT_BinaryCounter.vi and point Open FPGA VI Reference.vi to the (.lvbitx) file attached to this document.

If you have the FPGA module:

You can open the source code of AllDIO_FPGA.vi from the .lvproj attached to this document.

If you do not modify the code, you can open RT_BinaryCounter.vi and point Open FPGA VI Reference.vi to the (.lvbitx) file attached to this document. To configure Open FPGA VI Reference,vi, right click and choose Configure Open FPGA VI Reference. Choose the Bitfile option and browse to the attached bitfile.

If you do modify the source code of AllDIO_FPGA.vi, you will need to modify the reference of the Open FPGA VI Reference.vi to point to the new Build Specification, VI, or bitfile.

Modified Pin-out:

OnBoard DIO (Input and Output already implemented on the myRIO)

Output:

·         DO.LED3:0 is written onto LED0, LED1, LED2, and LED3 (the 4 LEDs on the myRIO)

Input:

·         Button0 (on the myRIO) is read from and put on DI.BTN

Outward Facing DIO

Output:

·         -DIO.B15:0.OUT is split into upper and lower half and written onto the ConnectorB/DIO15:8 and ConnectorB/DIO7:0 pins respectively

·         DIO.C_7:0.OUT is written onto the ConnectorC/DIO7:0 pins

Input:

·         ConnectorA/DIO15:8 and ConnectorA/DIO7:0 pins are read from, joined, and put on DIO.A_15:0.IN