Let's brush the dust off your myRIO's Analog Output channels and start making some sound!
In this example, we'll cover a lot of the fundamentals of how to generate acoustic-frequency square waves using an FPGA.
The exercises provided are based on FPGA4Fun.com's Music Box tutorial series, and will be an especially useful exercise for those of you who are experienced in targeting FPGAs with traditional hardware description languages (HDLs) such as Verilog or VHDL. Each exercise offers a side-by-side comparison between FPGA4Fun's Verilog example code and the corresponding LabVIEW block diagram. Similarly, if you've ever wondered just how a computer generates sound, here's your chance to find out!
Expect lots of information on how to define your own custom digital counters, simple Fixed Point (FXP) mathematics, FPGA Derived Clocks, Single Cycled Timed Loops using combinatorial logic, how to write to the myRIO's DACs, and even a little music theory. It sounds fairly intense, but a lot of what we'll be looking at is straight forward, and most importantly it's fun.
So, grab your headphones, and let's get started!
Figure 1: myRIO Music Box's FPGA Top Level Block Diagram.
Instructions: