DSP48E Multiplier

[edf]

Hello,

I've been experimenting with using the DSP48E slices in LabView FPGA (the direct low-level access control). I want to use one to run discrete Fourier transforms for phase measurement. I'm measuring a 10kHz sinusoid at a sample rate of 1MHz, so one period is 100 samples long. I then have a a look up table which contains a 0 - 2pi sinusoid (or cosine) pattern 100 samples long. These are then fed into a DPS48E block which is configured to p = p + (a*b) + carryin, the carryin is hard wired to nothing. I want to accumulate the 100 multiplications of signal and LUT over a single period, then reset the accumulation and start over, such that the output of the DSP48E is at 10kHz (i.e. one data point per period of signal). The literature on resetting the accumulator though is very unclear (at least to me, but then again I'm fairly new to FPGAs). So I have the following questions;

1. Is the "enable single reset for all registers" control the correct one to use?

2. What is the latency in this control, i.e. do I need to pass it a 'true' value the cycle before I want my accumulated value?

Any help/tips greatly appreciated, thanks!

[Liam_A]

Hi there EDF,

Thanks for your post! Could you possibly provide a little more information such as what hardware you are using please?

Please also feel free to post up any coding that you already have so that we can take a look for you.

Many thanks,

[edf]

Hi Liam,

It's a cRIO-9024 RT controller with a cRIO-9118 backplane (Virtex-5 LX110 I think...)

I've attacehd the top level FPGA VI, and the two sub-VI's I've written for the DSP48E part, and the arctan part for getting the phase. This is my first LV FPGA project, so it's likely to be a little rough around the edges, and I have a horrible feeling I have a loop execution rate problem that I've not solved yet with the decimation.

Written in LabView 2010 SP1 (with 2010 SP1 FPGA module).

Many thanks,

Ewan.

[Liam_A]

Hi Ewan,

My apologies for my slow reply. Kudos for the fact that this is only your first LabVIEW FPGA vi! I have chatted to one of our systems engineers here who has pointed out soething that he thought you may find of interest.

Please see the link below which will hopefully provide you with more information.

http://zone.ni.com/devzone/cda/tut/p/id/10015

Let me know how you get on with this,

Liam