回复： High speed and frequently communication between 2 PXI/PXIe chassis

[brucexliu]

Hi,

I am doing a project which required high speed data commnication between 2 chassis. 24 Double digital numbers in a loop rate 10K. The first thing come to my mind is using reflective memory. But the result is not good enough. The data transfer tooks 80% of time in the 10K loop, Then to avoid loop late, I could not do any thing else in this loop.

Is there any option else? Maybe using digital I/O in FPGA card?

Thanks in advance!

[brucexliu]

It's PXI-RT, And A 2MB/s is not high speed. But when I need a frequently transfering and receiving function in a determined loop rate, it is...

Here is how my application works.

PXI A and PXI B are synchronized using a 10K trigger signal.

PXI A: Loop Rate 10K, Read 12 DBL from PXI B  -->Processing-->Send 12 DBL to PXI B

PXI B: Loop Rate 10K, Read 12 DBL from PXI A  -->Processing-->Send 12 DBL to PXI A

the transfer part took more time than I thought.. My processing part will take about 50us, and the transfer data take about 70us while using reflective memory(GE 5565)... So I am wonder how can I make the transfer time less than 40us.