Matrix Multiplication in LabVIEW FPGA space

[LocalDSP]

Hello Athapa

    Can you please expand on what you mean with 'asd'? This is a technical forum for engineering minded LabVIEW developers where all questions are allowed and where clear technical answers are expected. We'd love to hear about your constructive addition to this thread on a perfectly valid question, namely how to find the optimal trade-off between host and FPGA computing.

   But of course if you don't have anything relevant to add... it's perfectly ok.

[Bhat_Maanay_Rice]

Hello LocalDSP,

Matrix multiplication on FPGA has been discussed in PowerDev forum. Download this and checkout "..\IP Cores\IP Cores - LabVIEW FPGA\HIL Solver\Matrix Multipy A x X - (9 x 9) - Marcus.vi" which is an example for a 9x9 matrix multiplication. Editing the IP for a 4x4 might take a bit of work but shouldn't be too complicated for "engineering minded LabVIEW developers". Write of input vectors, and read of output vectors can be done from the RT.

[LocalDSP]

Hi Athapa,

  Thank you for your very contributing addition to this thread, just wondering why you didn't skip the previous posting and went straight to your point.

Best Regards

[Bhat_Maanay_Rice]

I initially only read the first post by Muri777 and posted a response, only after posting which I found out that this was actually a thread and not a singular question. That's also when I found out you can't delete a post but can only edit it! 😛

Cheers!

[Muri777]

nathand, I cant post the code because it is far too long and large. The company I work for uses labview to run robot kinematics for entire systems and I am just trying to see if I can get the kinematics calculations to be completed on the FPGA rather than the RT for future uses if that makes sense. 

I 100% understand that for a 4x4x matrix it will be much easier just to run it on the RT however for future uses with the hundreds of matrix calcs that need to occur it would be much better to run them on the FPGA. Which is why I wanted to run it on there - more of a "can i do it" sort of project.

Im still working on my bit of code and I am probably using the wrong terminology but I will post up what I have so far soon!

Thanks!

[Muri777]

Hi again,

Got it working! Albeit for a 2x2 at the moment but thats all I need to give me a start. Thanks to all that helped! Here is a screenshot of its current set up. I know there are better ways of doing everything here (like indexing the values from the array coming into the fpga) but im working on it. Once again, am super new to this but this was a small win haha. 

I will update you all on my progress with 4x4 - hoping to have it done by early next week

Thanks again!

Muri

EDIT: the screen on top is from the RT and the screen at the bottom is the fpga side. sending inputs from matrices on RT to fpga, calculating there and sending back to RT to reshape to a 2d array then display

[nathand]

A couple of hints. First of all, you don't need all the separate Index Array nodes. Just drag down the bottom of one of them to index out additional elements. Also, if you leave the indices unwired, they'll start at 0 and automatically increment, so you don't need the 0,1,2,3 constants.

Right now you have no way to guarantee that the FPGA has finished processing before you read back the results. Consider some form of handshaking: for example, put a boolean control on the FPGA front panel. On the RT side, set the boolean true after you write the two arrays. On the FPGA side, wait until you see the boolean true before doing the calculation, then set the boolean false (through a local variable) after the calculation completes. On the RT side, after you set the boolean true to start the calculation, wait until it's false before reading back the result.

Or, simpler than this, use a DMA FIFO like I suggested earlier.

The sequence structure on the RT side is unnecessary. Instead of splitting the FPGA reference wire, chain it from one Read/Write node to the next (that is, connect the right-side output to the left-side input of the next one). Also, note that you can read and write multiple controls in the same node by dragging down from the bottom and selecting the desired controls, so you don't need separate nodes for the input A and input B matrices on the RT side.

[LocalDSP]

Also at some point you'll have to revisit your input and output data types. Right now they are both I16 (range +/-32767) but this restricts your input data range to only integers in the range [-90, +90] if you want to avoid overflow with a 4x4 matrix multiplication. if all your input values are +90 the result matrix will be a constant 32400, that is close to your output max range.

Furthermore the LabVIEW native integer operators that you are using will wrap around when overflowed, so for example the result of the multiplication of 256 by 256 (65536) will be returned as 65536 MOD 32768 = 0, and you'll have no way of knowing that your result is incorrect.

You should use Fixed-Point data types but fortunately LabVIEW can help you most of the way when configuring your formats. I have attached a simple VI that shows how it works. The only thing you have to do is to configure your input controls (right-click and select Properties>>Data Type, it is relatively self-explained from there). You can then either re-drop your output indicator to get the correct corresponding data type or you can check the Adapt to source box in your output control Properties>>Data Type pane. Just make sure that at the end there are no red coercion dots in your diagram.

[Muri777]

@nathand - ah yep i see what you mean with the index array nodes. Also good idea with the handshaking - ill work on it now alongside the 4x4.

I did try using FIFO but I ran into a bunch of problems with it (mainly me not knowing what I was doing) so I bailed on that idea. The sequence structure I added in because I wasnt sure whether or not the second half of the code on the RT side (that is, sending the appended matrix back to the RT from the FPGA) would try to execute before the calculations were done. Thanks for your suggestions though, I will use these now as I am working on the 4x4.

@LocalDSP - Yeah I'm not sure what range of values will be entered into the matrix so I might have to play with that. I have downloaded and played with the VI (thanks for that!) I will use fixedpoint for the 4x4 (:

[Muri777 · Accepted solution]

I fixed this issue of mine a while ago but I realized I never put the solution here. I only just remembered as I was scrolling through my files. Here is the quick and easy way to do matrix multiplication in the FPGA space. You can change the array size to make it 3x3, 4x4, 5x5 etc. 

Thanks for the past help!