NI 9213 not working in FPGA with other modules

[R^2]

Hello everyone,

I am trying to get my FPGA program working. I have been able to get the first three modules working (at least not throwing an error when the FPGA starts I haven't actually tested data though put yet) but no matter what I do I can't get the 9213 to work except an empty example project. If I diagram disable the loop with the NI 9213 (Module 4) calls in it the FPGA will run with no errors.

Here is the error I keep getting :

Error -61017 occurred at Open FPGA VI Reference in NI 9213 Getting Started (Host)ud.vi

Possible reason(s):

LabVIEW FPGA: You must recompile the VI for the selected target. ========================= LabVIEW FPGA: You must recompile the VI for the selected target.

Here is my setup: 

LabVIEW 2024 Q1

cRIO-9064 (Firmware: 24.0.04129, OS: NI Linux Real-Time ARMv7-A 4.14.146-rt67)

Slot 1, NI 9203

Slot 2, NI 9265

Slot 3, NI 9474

Slot 4, NI 9213

As a test I used the NI 9213 Getting Started.lvproj from the example finder to verify that the module by it self would work. And it does. 

To make the example work with my system;

* Create a copy of the example

* Right click the Project name -> Add Target and Devices

* Select Existing target or devices -> Discover an existing target(s) or devices(s) -> Real-Time CompactRIO -> Select my cRIO

* Click OK

* Select LabVIEW FPGA Interface

* Click Continue * Click Discover

* Copy the NI 9213 Getting Started (Host).vi from the sample cRIO to my cRIO

* Copy the NI 9213 Getting Started (FPGA).vi from the sample cRIO/FPGA Target to my cRIO/FPGA Target 

* Create and Build a Build Specification for the NI 9213 Getting Started (FPGA).vi 

* Open the NI 9213 Getting Started (Host).vi and right click the Open FPGA VI Reference select Configure Open FPGA VI Reference

* Select the Build Specification created above

* Click OK 

* (optional) Add an probe on the Error wire between the Open FPGA VI Reference and the Reset (Invoke Method) 

* Click Run at the top

Next I added a second loop in the NI 9213 Getting Started (FPGA).vi and added in the channels for the other modules. It will compile just fine but as soon as I try to run it it, the Open FPGA VI Reference throws the above error... again (See the NI 9213 Getting Started (FPGA) - w other modules.jpg, The top loop is the added modules and the bottom loop is the untouched loop from the example)

Next I disabled the new loop and recompile and it still throws the same error. You can see the diagram disable statement around the top loop.  Next I deleted the new loop and recompile and it still throws the same error. (saved the NI 9213 Getting Started (FPGA).vi as a new vi so I could keep the previous one as a sample and created a new build specification)

Next, in the project I disconnected from the cRIO, changed it's IP address to 0.0.0.0 and re-added my cRIO again (same steps above to add my cRIO to the sample project). This time I added the re-named NI 9213 Getting Started (FPGA).vi to my FPGA and recompiled again, and it works. 

So a few comments / observations,

1. In the attached vi, in the bottom loop, the case structure that is connected to the error wire, I can't use that in the top loop. I tried to reproduce this in my original project and I had to use Error State boolean from the unbundle by name in both loops. This seems odd to me.

2. I am not worried about the timing right now. The only thing I really want the FPGA for is to create a PWM output from one of the DO channels. If I can't figure this out by Monday I am going to try to switch to Mixed Mode and put everything except the DO module on the Scan interface. 

I will attach a screen shot and the sample project in just a bit.

I have done similar things to this in the past but I can't figure this out.  Any help would be appreciated.

Thanks, Ryan

[R^2]

Here is the Snippet. The bottom loop is the example code.
The top loop is what I am trying to add with it.

 

[R^2]

I am sorry this is a duplicate post.

[R^2]

It looks like the two posts have been merged.... Sorry about that everyone. 

Still looking for any input.

Thank you.

[R^2]

I may have the problem figured out. I have some more testing to do to verify and figure out a work around.

It looks like, if a thermocouple channel is open that error is thrown... 

I have an update compiling to try to refine what I am seeing but so far the target code works if I have a thermocouple in place for each channel I call in the FPGA. 

I will update more tomorrow.