PCI 5124 Tclk Synchronization Manual Adjustment

[ddemara]

I have two NI PCI-5124 boards that have too great an offset (~500 ps) when collecting data.  I am trying to perform the manual adjustment to reduce the offset as follows:

NI PXI/PCI-5124 Specifications (371135h.pdf Oct 2008) shows the following specs:
      Skew 500 ps
      Average Skew after Manual Adjustment <10 ps
with the note:
For information about manual adjustment, refer to the Synchronization Repeatability Optimization topic in the NI-TClk Synchronization Help. For additional help with the adjustment process, contact NI Technical Support at ni.com/support.

The help topic ("http://zone.ni.com/reference/en-XX/help/370592E-01/nitclk/synchronization_repeatability_optimization...") states:
1) Configure the devices for acquisition or generation synchronized with NI-TClk.
2) After the acquisition or generation is completed, but before you call Close on the product driver, read the oscillator phase DAC attribute using the individual product drivers for each synchronized device.
3) Store these values.
4) Before running the program again, change the program to set the phase DAC attributes to the stored values using the individual product drivers for each synchronized device before calling niTClk Synchronize VI (niTClk_Synchronize).

I modified example program tclk_synchronization.zip ("http://zone.ni.com/devzone/cda/epd/p/id/3517") to 1) work with PCI (instead of PXI), to 2) use an external waveform generator and to 3) add steps to capture the Oscillator Phase DAC attributes and to set them.  This is not working to reduce the synchronization deltas.

[Dan_K]

Hello ddemara,

I looked at your code and found at least one problem, the clock source in your code was still set to the PXI Clock, this should have been set to the PIX RTSI Clock.

One more suggestion would be to change the triggering to an immediate software trigger rather than the analog edge trigger you are seeing now. This will cause both devices to be started by T-Clk rather than by individual signals. This alone could be the source of your phase delay.

This information will help to narrow down the source of your problem.

[ddemara]

I was running with the switch set to T-CLK rather than standard, since I did not have an external clock and PCI doesn't have PXI clock.  Both sample rates were set to 100M and the frequency was 1000000.  Do I need an external clock to be able to manually adjust the timing?

[Steve_B]

Hi ddemara,

I am sorry for the delay in a response to your issue. I have talked with Dan and some engineers in R&D to put together a group of VIs that you can use in order to manually adjust the skew between your 5124 boards. The program you were using above was reading back the Oscillator Phase DAC Value and saving it to use in future iterations of the program, but this is half of the issue at hand. The other half of the issue is manually adjusting the Oscillator Phase DAC Value in order to decrease to skew to a minimum value. I am including both VIs that have been saved for LabVIEW 7.1 as an attachment which will be made available in  KnowledgeBase or NI Developer Zone article at a later point. I am also including a link at the bottom of my post to the NI Developer Zone article about T-Clock as a reference for the forum.

The first VI is for skew calibration and determines the optimal Oscillator Phase DAC Value by adjusting the sample clock relative delay for the NI Scope driver based on the measured skew between each digitizer's data. The niScope Adjust Sample Clock Relative Delay VI allows the user to change the Oscillator Phase DAC Value based on seconds, which is why this calibration method was used. The optimal value is stored in a file once the test has completed so it can be used in the future. The front panel of the VI will display the time domain data of each digitizer as well as the skew adjustment and final skew values.

The second VI reads the Oscillator Phase DAC Value from the saved file and runs the user defined number of tests (# of acquisitions input on the front panel) to determine the repeatability of the skew. The front panel of the VI will display the time data of the acquired signals as well as the histogram data of the skew that was measured in order to see the Gaussian curve that results from enough iterations. There are also indicators that show the calculated standard deviation of the measurements and the RMS skew data.

You will need to have both PCI-5124s and a function generator in your computer. You should split the function generator signal and connect it to both digitizers using cables of the same length and impedance. The function generator will be running and the digitizers will trigger off of the same signal. The resulting data will be compared to find the skew in time. This resulting skew is used for the repeatability testing, but there are additional steps for the calibration VI. The digitizers will be configured for another acquisition but the sample clock relative delay for the first digitizer will be adjusted by the measured skew. The process will repeat as designated by the iteration count of the for-loop in the fine tune calibration section of the sequence structure. I have a hard-coded value of 3 in there now as I noticed that most of the adjustment was made by the third iteration and additional iterations tended to adjust with similar skew values as a result.

In each VI you have control over the settings of the digitizers and function generator. You can configure the acquisition and generation rates as well as the channels, input ranges, trigger settings, and the record size.

Please let me know what questions you have regarding the VIs and your testing. You should see much better results than you were getting before. Essentially you will need to set up the hardware and choose your desired settings on the front panel of the VIs. The calibration VI should be executed first and then the repeatability of that particular Oscillator Phase DAC Value can be measured.

National Instruments T-Clock Technology for Timing and Synchronization of Modular Instruments
http://zone.ni.com/devzone/cda/tut/p/id/3675