do fpga front panel control/indicator read/write need to be sync'd with host VI

[kmc]

If I am writing to a front panel control or reading from a front panel indicator of an FPGA VI from a host VI using the reference node, do I need to synchronize the writes/reads such that I am not writing to the control while the FPGA is reading from it or reading from the indicator while the FPGA VI is writing to it?  Unless this is handled 'behind the scenes' by LabVIEW it would seem that I would have to, however I didn't see any documentation about this and it seems that a lot of the examples I have seen do not show any type of synchronization, the controls are just written to by the host and read by the target

Thanks,

Kevin C.

[Craig_D]

Kevin,

On their own, the VIs on the host and the FPGA VI run asynchronously.  You do not explicitly have to synchronize for the purposes of "avoiding a collision".  You will read the most recently acquired input value, and output values from the control algorithm will be updated on the I/O cycle.

If your acquisition loop on your host is running faster than your control loop on your FPGA, synchronization will most likely not be needed.  However, there are two reasons why you would need synchronization:

1. If the timing of the FPGA VI is needed to control the timing of the application running on the host, or vice-versa.
2. To acquire data at a known rate and transfer all data without loss to the host application for processing or data logging.

This can be accomplished through interrupt or DMA based handshaking.  For more information on these methods, see lessons 5 and 6 of the LabVIEW 8 FPGA Module Training.

Please let me know if you have any more questions.

Regards,

Craig D
Applications Engineer
National Instruments