Digital Waveform Generator/Analyzer (HSDIO) Loopback Test VI

[dan_tuq]

Hello!

I am simply looking to see if some LV code already exists to perform a loopback test on the PCI-6541. It doesn't specifically have to be the 6541 DWG/Analyzer. The general idea to generate and acquire a digital waveform already exists in some LV examples (i.e., Dynamic Generation and Acquisition-Demo.vi). I'd like to extend that example to generate a 20 period 8 MHz 50% duty cycle TTL pulse train on a DIO pin, and acquire and compare the generated pulse train (one dimensional array of integer data or digital waveform [WDT] data type) on another DIO pin to verify signal integrity.

Thank you in advance for your efforts!

Sincerely

dan 

[Dustin_D]

Hi Dan,

Try this example.  You may have to modify it some but this should be mostly what you need.  I hope this helps!

Regards,

[dan_tuq]

Hi Dustin!

I've managed some progress by modifying the Dynamic Generation & Acquisition-Demo VI, and creating a TTL pattern generator wired to the niHSDIO Write Named Waveform VI. I eliminated the niHSDIO Export Signal & Configure Trigger VIs since I'm generating the custom signal pattern from LV.

Thanks for your reply!

dan