Power Electronics Development Center

cancel
Showing results for 
Search instead for 
Did you mean: 

Multi Channel RMS Calculations

Hi,

I'm working with a cRIO-9112, which is doing some measurement and control. One of the problems I'm facing is that I don't have enough DSP48s. I would like to measure RMS values for three phases within the FPGA code, but it uses too many DSP48s to use three of the FPGA RMS blocks. My question is if there is a way to make it multi-channel, or even if there is a way to take accurate rms readings on the Real time side? Has anyone tried this?

Thanks

0 Kudos
Message 1 of 5
(4,696 Views)

DOjala,

Yes, it is certainly possible to implement a multichannel RMS. I have done this with good results. Thanks to BMac at NI for input and examples. I calculate the sum of squares in the FPGA VI and offload the averaging and square root operation to the RT VI.

sumsq.png

The array has the signals that I want to RMS. This resides in a while loop with 100us update rate and so the 166 samples implies 60Hz RMS calculation.

I am not sure how to attach VI's here but this is how the insides of the Multi-channel SUMSQ looks like:

sumsq1.png

And this is how the FPGA SUMSQ looks like. NOTE: this VI is set to non-reentrant clone execution to save on DSP48's

sumsq2.png

0 Kudos
Message 2 of 5
(3,917 Views)

Very nice! Please do attach your code.

Here's how to add an attachment in the discussion forums:

1. Click Use advanced editor in the upper right corner of the reply dialogue.

2. Click the Browse... button at the bottom left corner of the dialogue to attach the file(s).

0 Kudos
Message 3 of 5
(3,917 Views)

Here you go my friend.

The VI defined block memory is set to 9 channels because I needed 9. Modify as needed.

Cheers.

0 Kudos
Message 4 of 5
(3,917 Views)

Thank you! This will solve the problem. I hadn't thought of separating the calculation into two parts carried out in FPGA and Real Time. Smart.

0 Kudos
Message 5 of 5
(3,917 Views)