How do I access LabView 8.2 FPGA VI FIFO and Memory objects in Visual C++ .NET?

[Ryan Bubinski]

I wish to write a C++ .NET application that is able to communicate with a NI 783xR FPGA card and LabView 8.2. Specifically my application needs to be able to start and stop VI's that are loaded on the card's memory and read and write to memory objects such as FIFO arrays and Memory Blocks.

• Is it possible to do this through LabView's ActiveX server capabilities. If so, can someone recommend a good tutorial that outlines the procedure?
• Are there better options than ActiveX for interfacing with FPGAs, such as a data acquisition class library?

[Van_L]

Hi Ryan,

The only way to program any NI FPGA target (device) is LabVIEW FPGA. Currently, there's no other way to do so.
What exaclty are you trying to accomplish, can you explain more about your application and goal?

Thanks

[Ryan Bubinski]

Gladly,

I am not interested in directly programming the FPGA. I currently design and load my VIs with the LabView FPGA module. However, I am interested in interacting with the FPGA's VIs once they have been loaded onto the device. More specifically, I wish to write a Visual C++ .NET program that can write to and read from the FIFO and Memory objects I create in my VIs with the LabView FPGA module, either by communicating directly with the FPGA or through LabView with ActiveX objects (I presume). I am uncertain how to go about doing this.

Any help you are able to provide is greatly appreciated.

[Van_L]

Hi Ryan,

vi’s downloaded onto the FPGA must communicate with a host, and this host can only be labVIEW on your pc or labVIEW on your Real-Time controller. In order to use other programs to interface with your FPGA, a host labVIEW vi’s needs to be wrapped into a DLL then be called by your program.

Direct read/write of the FIFO using DMA or other methods cannot be achieved directly using other programs. Although this can be achieved by calling a labVIEW DLL, it could slow data transfer down since you are adding another layer between your program and FPGA.

For more information, please refer to this KB