How to verify the real-time property of my veristand project

[GAOY0806]

Hi,

     My Veristand project consists of a dll file model and a FPGA hardware. The project is deployed in the PXI target and runs successfully. I wonder if there is a way to verify the real-time property of the running poject. For example, a parameter or a tool in Veristand nivescreen?

Thanks.

[PeterFoerster]

How about the "Actual Loop Rate" in the System Channels? Any deviation here would be an indicator of issues, wouldn't it?

In the System Channels you will find a couple more useful channels. According to the System Channels Table HP Loop Count might also be a channel to watch.

[Guilherme_Correa]

You may also check the HP Count channel, which indicates if your simulation missed the determinism. I have used this channel to evaluate if my simulation data was synced, whenever this value was increased the simulation was stopped.

[timtamslam]

In general I'd recommend reviewing the engine architecture and determining which points are of most interest to you.

http://www.ni.com/product-documentation/13033/en/

If you're interested in quantifying the determinism of your models and your FPGA hardware you would be interested in the Model Execution Loops and the PCL, respectively. You should be able to find more than enough information on these via system channels and model execution channels

http://zone.ni.com/reference/en-XX/help/372846K-01/veristand/system_channels_table/

(as already mentioned by PeterFoerster and Guilherme)

• HP Count
• Actual Loop Rate

I would also keep an eye on

• Model Count - The number of times the models have not completed their execution in time.

http://zone.ni.com/reference/en-XX/help/372846J-01/veristand/model_execution/

View the model execution status, such as running or paused.	Model Status
View the time in the model.	Model Time
View how long the current time step of the model has been running.	Time Step Duration