Veristand Depyloyment Error

[Konaks]

Hi everyone

I am trying to use FGPA addon custom device with Speciality IO template my purpose is generating pwm singal with FPGA

I followed fpga addon custom device QuickStart  and  Speciality IO template Example documents

I configured system explorer according to these documents but when I trying to deploy my project into RT system I get deployment Error below:

How can I solve this error. Thanks in advance.

My system:

Veristand 2021 R2 

PXe-8881/PXIe-7820R 

 

Deployment Error
Project Window.lvlib:Project Window.vi >> Project Window.lvlib:Command Loop.vi >> Project Window.lvlib:Connect to System.vi
<append>=========================
NI VeriStand: NI VeriStand Engine.lvlib:VeriStand Engine Wrapper (RT).vi >> NI VeriStand Engine.lvlib:VeriStand Engine.vi >> NI VeriStand Engine.lvlib:VeriStand Engine State Machine.vi >> NI VeriStand Engine.lvlib:Initialize Inline Custom Devices.vi >> Custom Devices Storage.lvlib:Initialize Device (HW Interface).vi
<append>=========================
NI VeriStand: Error occurred at the following location:

"Targets/Controller/Custom Devices/FPGA Addon"
Error 6001 occurred at Project Window.lvlib:Project Window.vi >> Project Window.lvlib:Command Loop.vi >> Project Window.lvlib:Connect to System.vi

This error code is undefined. Undefined errors might occur for a number of reasons. For example, no one has provided a description for the code, or you might have wired a number that is not an error code to the error code input.

Additionally, undefined error codes might occur because the error relates to a third-party object, such as the operating system or ActiveX. For these third-party errors, you might be able to obtain a description of the error by searching the Web for the error code (6001) or for its hexadecimal representation (0x00001771).

[ZYOng · Accepted solution]

May be you used an earlier version of FPGA Addon and the error message was not routed to the VeriStand engine.

I believe that this is caused by the naming mismatch between the channel names in VeriStand and the front panel items of your FPGA VI.

[Konaks]

I updated Veristand Custom Devices version 2021 R2 to 2024 Q4 now its working thank you very much. I have one more question I added pwm out as shown below but I couldn't understand clearly which pin does this channel represent

[ZYOng]

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@Konaks wrote:

 I added pwm out as shown below but I couldn't understand clearly which pin does this channel represent

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Check your FPGA VI source code and jot down the pinout. The compiled bitfile does not contain any pinout information.