LabView FPGA flat sequence structure CLOCK

[ian20101]

My purpose is to use the same node to generate square waves of different frequencies. This square wave has 13 cycles.
I used the Flat sequence structure to create 5 frames. The first frame used an external trigger signal. The second frame had a built-in square wave generator in LABVIEW to generate a 10MHz signal for use by the FPGA I/O node. The third frame was The FPGA I/O node is shut down. In the fourth frame, there is another square wave generator built into LABVIEW, which generates a 20MHz signal for use by the FPGA I/O node. The fifth frame also shuts down the FPGA I/O node.

I found that if the square wave generator frequencies of the second frame and the fourth frame are different, the signal will jitter left and right.

What should I do?

 10MHz20MHzcorrect signalshaking signalshaking signalmain

[Bob_Schor]

Tell me if I am correct about what you want to do:

• When you push a button, you want to deliver a Pulse train to a Digital Output line.
• The Pulse Train consists of N "sub-Trains".
• Each sub-Train has M square Pulses of width M1 with a spacing between pulses of M2 (M1 is the "On" time, M2 is the "Off" time -- if M1 = M2, you only need to specify one of them, of course).
• Following a sub-Train, there is a Pause P(i) before starting the next sub-Train (all of the P(i), i = 1..N, could be the same, in which case you only need one value of P).

Is this correct?  If so, the FPGA code almost "writes itself".  Start with a While Loop (with False wired to the Stop terminal), and put inside it a Case Statement with the "Start" button wired to the Case selector.  Make this fill the While Statement, as you'll do everything inside the True Case.

You need an Array of Clusters that have the following values, one for each Pulse Train:  # of Pulses to deliver, On Time (in FPGA-clock intervals), Off Time (which you can omit if On Time = Off Time), and Idle Time (between this Pulse Train and the next one).  Feed this Array into the For Loop, and unbundle the components.

Now an inner For Loop generates the Pulse Train.  Wire "# Pulses" to the For Loop's N input.  Put a 4-compartment Sequence inside the For Loop.  In compartment #1, set your chosen DO port "True" (or "High").  In #2, use the FPGA Configure Wait (the Hour-Glass -- I usually use the µs timer) to set the Pulse Width.  In #3, write "False" to the DO port (to stop the Pulse), and in #4, write the parameter for "Space between Pulses" (which will be the same as #2 if On and Off times are the same) to another Wait timer -- that's 4 Timers per Pulse.  This will generate the N Pulses that you need.

Now you need to wait for the "Inter-Pulse" time.  In the last bin of the 4-bin Sequence, put the Off-Time interval.  Outside the Sequence, wire this to another Wait.  All of this is inside the For Loop that is counting how many Pulse Trains (each having it own Timing and # Pulse parameters specified) you want to do per Button Push.  At the right edge of the For Loop (inside the Loop), put a False constant, and outside the For, wire it to "Start" (to turn off the entire sequence.

Done.  Push the Start Button (on the Host, or write "True" to the Start control in the RT side) and you should get one set of Pulse Trains.  These pulses should be rock-solid square, and as exact as the crystal clock driving your FPGA.  

Bob Schor

[ian20101]

Hi Bob.
Thank you very much. You explained it very carefully and gave me a lot of inspiration.
Yes, exactly as you said.

I wrote the program as you said.
But I don't understand what you mean:

"Now you need to wait for the "Inter-Pulse" time. In the last bin of the 4-bin Sequence, put the Off-Time interval. Outside the Sequence, wire this to another Wait. All of this is inside the For Loop that is counting how many Pulse Trains (each having it own Timing and # Pulse parameters specified) you want to do per Button Push. At the right edge of the For Loop (inside the Loop), put a False constant, and outside the For, wire it to "Start" (to turn off the entire sequence."

Create a False constant inside the for loop and connect it to "Start" outside the For loop.

1.Does "Start" refer to start on the case structure?
2. If I write the program like this (the purpose is to generate 10MHz and 20MHz square waves):
On time is correct.
But the off time is incorrect.
I need 50% each.

I don’t know what you mean by setting the off time interval.

I tried changing the program so that it can achieve 10MHz and 20MHz cycles, but it didn't seem to be successful.

 

10MHz 3cycle:

 

20MHz 3cycle:

 

 

Sorry I'm a newbie, how can I improve my program?

[Bob_Schor]

My apologies.  I didn't read my initial description carefully, and forgot what I called the time between the Pulse Trains (2 pulses, in your example)-- I called it the "Inter-Pulse Time".  Let me try again.

     First, let me note something about the images you are showing.  I'm assuming you are turning On and Off a Digital Output line that you are monitoring with an oscilloscope probe that doesn't draw appreciable current -- the trace should be essentially vertical, and you should see "rectangular" pulses, not trapezoidal ones. ,  Something is wrong with the circuit!

So let's start again.  Inside the For Loop, you want to make one pulse.  I divided this into four actions, putting each in a "box" of a Frame sequence:

1. Make DO go High.
2. Wait for "On" time intervals.
3. Make DO go Low.
4. Wait for "Off" time intervals.

If the For loop N = 3, this will generate 3 pulses.

But what if you want to generate these 3 pulses, wait for some time W, then generate the same 3 Pulses, wait W, generate 3, wait W until you push a Stop button?

The moment I say "Stop button" you thing "Surround it with a While Loop, with the Stop button wired to the While Stop control".  But how to get a Pause to occur after the For loop runs (and delivers the 3 Pulses)?  You can't just put a "Wait" following the For, because what controls when it runs?  Well, you could use yet another Frame sequence, but (until I started programming FPGA's) I hated Frames, so I used "the Third Law of Data Flow" -- inside the For loop that makes the Pulse Train and contain a Frame sequence, I put the time P that I want, and bring it out the right (output) side of the For loop, and wire it to the Wait "waiting" for it.  So now the Wait cannot start to Wait until the For loop finishes, exactly what we want!

So let's look at the For Loop again.  It has 3 Time intervals coming into it:  T-Hi, T-Lo, and T-Wait.  The first two go into the 4-element Frame sequence, the third goes below the Frame Sequence and out the right side to the inter-pulse Wait.

Once you have this "One Pulse Train with N1 Pulses at T1/T2 Times with wait W after all N1 pulses have been played", all you need to do to make it generate a sequence of Pulse Trains with different T1/T2 times and post-pulse Waits W is to do the following:

• Create a Cluster where you put Number of Pulses (I32), Hi Time (I32), Lo Time (I32), and Wait (I32).
• Make an Array of these clusters.  Fill the Array with the sets of numbers you want to use.
• Take the code you have (which wants one set of N, H, L, and W) and wrap it in (yes!) another For Loop.
• Inside the For Loop, you'll have a Cluster with N, H, L, and W.  Unbundle it, and feed the four values into the code you've already created that does one set of N Pulses with Hi/Lo times H and L and waits W before doing the next (if any) set.

Bob Schor

[ZYOng]

On top of what Bob_Schor has shared in detail, what hardware are you using?

If you are using cRIO, not all C Series DIO can run at 1 us or 500 ns.

[ian20101]

Thank you ZYOng.
I use MyRIO to control the signal.
Its working clock is 40MHz
It can work in 25ns
So I want to create 10MHz and 20MHz square waves.

[GerdW]

Hi ian,

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@ian20101 wrote:

Its working clock is 40MHz

…
So I want to create 10MHz and 20MHz square waves.

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I would use a SCTL set to iterate with 40MHz.

Then you just need to switch the output each x iterations…

(Pre-calc high/low iteration counts before the loop.)

[ian20101]

Thank you again Bob.
I probably understand what you mean.
But I'm curious why this happens: (Hi-time ≠ Lo-time)

Did I do something less?

The trapezoid seems to be an issue with my carbon rods.

 

There seems to be a delay between the end of the sequence and the start of the for loop

 

I thought the problem might be in the for loop, so I changed the sequence in the for loop.

what i want is
Hi-time = Lo-time = 50%.

This is all my programs

 

[GerdW]

Hi ian,

---

@ian20101 wrote:

I thought the problem might be in the for loop,

---

Yes.

The FOR loop need some processing time (aka introduces delays): it's not executed within a single cycle!

That's why I suggested to use a SCTL instead: the SCTL is made to guarantee cycle-accurate executions within the FPGA…

[ZYOng]

Try Pulse Width Modulation (PWM) IP Core for LabVIEW FPGA