fairchild fmdq8023 high voltage p and n mosfet spice models

[rjames09]

hi there,

I'm having some difficulties getting a model to work of a FMDQ8023 MOSFET in multisim.  The spice model I've obtained is a .lib format so in order to import this into multisim I've had to create a custom component and insert the text from the .lib file (find at the bottom of this post) into the custom model text input.  Unfortunatley when the device is created an error message appears and when ignored the model shows no desired functionality.  Upon further inspection of the .lib file I can see that there are two .subckt models, one for the p type mosfets on the chip, another for the n type.  However it seems that the gate, drain and source pins for both models share the same nets.  This seems contradictory to the device setup so I have tried importing the netlists as separate custom components (n & p).  This however has shown no success.  Upon modification of the model file once the component has been created I am getting the following error messages:

"SPICE Netlist Error in schematic RefDes '', element 'Bsim3:FDMQ8203_Q2Q3_P':  Unsupported model type 'PMOS'

SPICE Netlist Error in schematic RefDes '', element 'M_BSIM3:FDMQ8203_Q2Q3_P':  Unsupported SPICE device type 'MOS7'
Do you want to continue?"

any advice on how to proceed would be much appreciated,

many thanks,

rob james

--- copy of FMDQ8023.lib file:

.SUBCKT FDMQ8203_Q1Q4_N 2 1 3
******************************************************************
**      Fairchild Discrete Modeling Group                       **
******************************************************************
**      Website         www.fairchildsemi.com\models            **
******************************************************************
**      (C) Copyright 2009 Fairchild Semiconductor Corporation  **
**                      All rights reserved                     **
**                                                              **
**                      FDMQ8203 Spice model                    **
**                    Revision RevA, 26 July 2011               **
******************************************************************
*Nom Temp 25 deg C
Dbody 7 5 DbodyMOD
Dbreak 5 11 DbreakMOD
Lgate 1 9 1.503e-9
Ldrain 2 5 0.1e-9
Lsource 3 7 0.521e-9
RLgate 1 9 15.03
RLdrain 2 5 1
RLsource 3 7 5.21
Rgate 9 6 6.11

* Shielded  Gate 
D_D1 100 5 D_SG_cap
D_D2 100 101 D_SG_cap
R_R1 101 7 6.58
C_C1 6 101 16e-12
.MODEL D_SG_cap D (IS=1e-9 n=1 RS=5e-3 CJO=0.23e-9 M=0.54 t_abs=25)

It 7 17 1
Ebreak 11 7 17 7 110.75
Rbreak 17 7 RbreakMOD 1
.MODEL RbreakMOD RES (TC1=0.69e-3 TC2=-0.25e-6)
.MODEL DbodyMOD D (IS=1e-12 n=1.05 RS=23.5e-3 TRS1=1.5e-3 TRS2=1e-6
+ CJO=0.06e-9 M=0.4 TT=1e-9 XTI=2.75)
.MODEL DbreakMOD D (RS=8e-3 TRS1=1e-3 TRS2=1e-6 )
Rsource 7a 7 3.445e-3
Rdrain 5 16 RdrainMOD 60.0e-3
.MODEL RdrainMOD RES (TC1=6.45e-3 TC2=19e-6)
M_BSIM3 16 6 7a 7a Bsim3 W=0.37 L=1.15e-6 NRS=0 NRD=0
.MODEL Bsim3 NMOS (LEVEL=7 VERSION=3.1 MOBMOD=3 CAPMOD=2 paramchk=1 NQSMOD=0
*Process Parameters
+ TOX=1000e-10
+ XJ=0.62e-6
+ NCH=0.96e17
*Channel Current
+ U0=670 VSAT=500000 DROUT=1.8
+ DELTA=0.05 PSCBE2=0 RSH=3.445e-3
*Threshold voltage
+ VTH0=3.25
*Sub-threshold characteristics
+ VOFF=-0.1 NFACTOR=1.4
*Junction diodes and Capacitance
+ LINT=0.175e-6 DLC=0.175e-6
+ CGSO=174e-12 CGSL=0 CGDO=0.5e-12 CGDL=155e-12
+ CJ=0 CF=0 CKAPPA=0.8
* Temperature parameters
+ KT1=-2.1 KT2=0 UA1=4.75e-9
+ NJ=10)
.ENDS  
*
*
.SUBCKT FDMQ8203_Q2Q3_P 2 1 3
*Nom Temp 25 deg C  
Dbody 5 7 DbodyMOD   
Dbreak 7 11 DbreakMOD   
Lgate 1 9 0.559e-9  
Ldrain 2 5 0.1e-9  
Lsource 3 7 0.281e-9  
RLgate 1 9 5.59  
RLdrain 2 5 1  
RLsource 3 7 2.81  
Rgate 9 6 1.48  
It 7 17 1  
Ebreak 5 11 17 7 -90  
Rbreak 17 7 RbreakMOD 1   
.MODEL RbreakMOD RES (TC1=0.95e-3 TC2=-0.2e-6)  
.MODEL DbodyMOD D (IS=0.67e-12 n=1 RS=28e-3 TRS1=0.4e-3 TRS2=4e-6   
+ CJO=0.01e-9 M=0.65 TT=3e-9 XTI=2.6)  
.MODEL DbreakMOD D (RS=0 TRS1=65e-3 TRS2=300e-6 )  
Rsource 7a 7 4.467e-3  
Rdrain 5 16 RdrainMOD 150e-3  
.MODEL RdrainMOD RES (TC1=6.1e-3 TC2=8.8e-6)  
M_BSIM3 16 6 7a 7a Bsim3 W=0.66 L=1.7e-6 NRS=0 NRD=0  
.MODEL Bsim3 PMOS (LEVEL=7 VERSION=3.1 MOBMOD=3 CAPMOD=2 paramchk=1 NQSMOD=0  
*Process Parameters  
+ TOX=410e-10
+ XJ=1.6ue-6 
+ NCH=1.5e17 
*Channel Current  
+ U0=420 VSAT=100000 DROUT=1.8  
+ DELTA=0.7 PSCBE2=0.00001 RSH=4.467e-3  
*Threshold voltage  
+ VTH0=-1.76  
*Sub-threshold characteristics  
+ VOFF=-0.21 NFACTOR=1.0  
*Junction diodes and Capacitance  
+ LINT=0.4e-6 DLC=0.4e-6   
+ CGSO=330e-12 CGSL=0 CGDO=20e-12 CGDL=700e-12   
+ CJ=0 CF=0 CKAPPA=1
* Temperature parameters   
+ KT1=-1.1 KT2=0 UA1=7.0e-9  
+ NJ=10)  
.ENDS     

[BenClark]

Hi Rob, thanks for posting,

I've had a look at the model makers website and it looks like the only available model for this device is a pSPICE model made using OrCAD.

While some pSPICE models are compatible with SPICE, there are some that aren't. I am currently trying to see why these model and device types are unsupported and I will try to get back to you when I have more information.

[johnsold]

I do not know what Multisim can handle, but some SPICE versions are not compatible with the Level 7 MOSFET models.  Since one of your error messages refers to "Unsupported...MOS7" that may be a place to look.

Lynn

[OStep]

The macromodels of the power FETs use the BSIM3.1 device as the primary switching element. Multisim supports the BSIM3.32 device, which is at level 8. I made a few changes to the models to make them work:

1. Change to level 8

2. remove the unrecognized parameter NQSMOD which controls to the noise model. Presumably this is not needed for your power simulation.

3. Fixed typo on the xj parameter in P-Fet. Vendor specified it as 1.6ue-6. It was causing problems and was likely a typo. I changed it to 1.6e-6.

Attached is a circuit that contains components with those models in a test bench. Run transient analysis to see basic switching operation. 

I hope it works out for you.

[OStep]

file attached

[bikeron]

OK same issue different part. I am trying the FDMC7660S (which has an integral Schottky diode from drain to source) and the netlist comes up as OK but will not work in a simple switching circuit. No convergenge issues come up either. I did your parts 1 through 3 as described above.

Can you give further guidence?

Attached is the switching circuit.

Here is the model:

.SUBCKT FDMC7660S 2 1 3
******************************************************************
** Fairchild Discrete Modeling Group **
******************************************************************
** Website www.fairchildsemi.com\models **
******************************************************************
** (C) Copyright 2009 Fairchild Semiconductor Corporation **
** All rights reserved **
** **
** FDMC7660S Spice model **
** Revision RevA, 23 Feb 2010 **
******************************************************************
*Nom Temp 25 deg C
Dbody 7 5 DbodyMOD
Dschottky 7 5 DSchottkyMOD
Dbreak 5 11 DbreakMOD
Lgate 1 9 0.517e-9
Ldrain 2 5 0.005e-9
Lsource 3 7 0.09e-9
RLgate 1 9 5.17
RLdrain 2 5 0.05
RLsource 3 7 0.9
Rgate 9 6 0.71
* Shielded Gate
D_D1 100 5 D_SG_cap
D_D2 100 101 D_SG_cap
R_R1 101 7 1.29
C_C1 6 101 197e-12
.MODEL D_SG_cap D (IS=1e-9 n=1 RS=4e-3 CJO=4.5e-9 M=0.6 t_abs=25)
It 7 17 1
Ebreak 11 7 17 7 33
Rbreak 17 7 RbreakMOD 1
.MODEL RbreakMOD RES (TC1=0.5e-3 TC2=-1e-6)
.MODEL DbodyMOD D (IS=13.382e-12 n=1.04 RS=0.95e-3 TRS1=1.5e-3 TRS2=1e-6
+ CJO=0.47e-9 M=0.34 TT=3e-9 XTI=1)
.MODEL DSchottkyMOD D (IS=4.194e-6 n=1 RS=45e-3 TRS1=1.5e-3 TRS2=1e-6
+ CJO=0.47e-9 M=0.34 TT=3e-9 XTI=-18)
.MODEL DbreakMOD D (RS=30e-3 TRS1=1e-3 TRS2=1e-6 )
Rsource 7a 7 0.236e-3
Rdrain 5 16 RdrainMOD 1.22e-3
.MODEL RdrainMOD RES (TC1=3.5e-3 TC2=10.5e-6)
M_BSIM3 16 6 7a 7a Bsim3 W=7.05 L=1.22e-6 NRS=0 NRD=0
.MODEL Bsim3 NMOS (LEVEL=8 VERSION=3.1 MOBMOD=3 CAPMOD=2 paramchk=1
*Process Parameters
+ TOX=500e-10 ;Oxide thickness
+ XJ=0.16e-6 ;Channel depth
+ NCH=1.9e17 ;Channel concentration
*Channel Current
+ U0=1250 VSAT=500000 DROUT=1.2
+ DELTA=0.4 PSCBE2=0.00001 RSH=0.236e-3
*Threshold voltage
+ VTH0=1.22
*Sub-threshold characteristics
+ VOFF=-0.1 NFACTOR=1.1
*Junction diodes and Capacitance
+ LINT=0.375e-6 DLC=0.375e-6
+ CGSO=112e-12 CGSL=10e-12 CGDO=8.5e-12 CGDL=170e-12
+ CJ=0 CF=0 CKAPPA=0.15
* Temperature parameters
+ KT1=-1.1 KT2=0 UA1=2.5e-10; UA1=3e-9
+ NJ=10)
.ENDS

[OStep]

Hi,

The .subckt pin order is not clear from the SPICE model (in fact it is not mentioned at all). But I happened to know that it is 1)Drain, 2)Gate, 3)Source. You had them connected to the symbol pins in a different order. I corrected this. The circuit with new component is attached.

Thanks

[bikeron]

Ahhh.. pin mismatch. Thanks, it works now.

Ron