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How to implement an "else" case in a Condition Statement ?

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Here is what I want to do with a hardware setup such as ao0 feeds into ai0 on my DAQ card.

 

If ai0 > ai0_levelcheck then

  ao0 = ai0/2

  return

else

  return

 

 

To do so I created the procedure showing on the pic below.

 

Procedure

 

 

On the Workspace, I have a control linked to ai0_levelcheck (a user channel) that is initially set at 10V. Another control commands ao0.

Somehow any time I change the value of ao0, the system brings ao0 back to 0V indicating the condition statement is likely looping until the voltage reached 0, despite the fact ai0_levelcheck is set at 10V. So essentially how to implement a "else" case in the prodedure?? 

Thx.

 

 

 

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Solution
Accepted by topic author LDBM

It would be a lot easier to implement custom logic like this in a model, so if you have access to any development tools I recommend doing that instead.

 

However, to do what you want, just change the sign on your compare ( > instead of < ) and change the go to location to skip the next line. That way you skip the set or you don't skip the set.

Stephen B
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Thanks Stephen it worked. 

 

What I did is described in the image below.  I guess I hadn't caught up on the fact the lines are sequentials , which was obvious...

 

Procedure.jpg

 

 

I am just new at Veristand, and I am poking around to understand which tool/feature is good for what... Documentation is rather slim.. I will try the Model framework as you suggested, it is likely a better way.

 

What would Procedure good for based on your experience? ?Just basic steps, or startup steps I am guessing...

 

Thx.

Laurent.

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Glad to hear it.

 

Procedures are nice for reacting to an event... However they aren't that awesome when you start getting more advanced like trying to perform complex calculations or having branching, conditionals, or state flow. So I'd say they are useful, just not one-size-fits-all.

 

You can learn the model framework by looking at the examples in C:\VeriStand... But that's really low level. It is C coded models at that point, which is good for some people, but most people prefer to write their models in a higher level modeling tool like LabVIEW, SimulationX, Simulink, etc...

Stephen B
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Here is a video of creating a model in LabVIEW and bringing it into NIVS

 

http://zone.ni.com/devzone/cda/tut/p/id/12785

Stephen B
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It may be unclear because the connector pane terminal assignments are off the screen in that video.  Model Inports are the "Required" inputs on the connector pane.  Nick is going to fix the video Stephen linked to, and he sent me a link to this video: http://zone.ni.com/devzone/cda/tut/p/id/12840 that shows the assignments.

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Thanks guys. I just watched this video a few minutes ago and was on my way to build a simple LabVIEW Model.

 

I am an experienced LabVIEW developer, but rather green on the Veristand front. And I must say I am always a bit reluctant with the configuration-based approach of these tools... But so far, it looks like Veristand is powerful. Once I understand it better, I am eager to see how I can build complex aps with this...

 

Cheers, 

Laurent.

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